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SPEAr: clk: Add Fractional Synthesizer clock
All SPEAr SoC's contain Fractional Synthesizers. Their Fout is derived from following equations: Fout = Fin / (2 * div) (division factor) div is 17 bits:- 0-13 (fractional part) 14-16 (integer part) div is (16-14 bits).(13-0 bits) (in binary) Fout = Fin/(2 * div) Fout = ((Fin / 10000)/(2 * div)) * 10000 Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000 Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000 div << 14 is simply 17 bit value written at register. This patch adds in support for this type of clock. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Viresh Kumar
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Arnd Bergmann
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May 12, 2012
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/* | ||
* Copyright (C) 2012 ST Microelectronics | ||
* Viresh Kumar <viresh.kumar@st.com> | ||
* | ||
* This file is licensed under the terms of the GNU General Public | ||
* License version 2. This program is licensed "as is" without any | ||
* warranty of any kind, whether express or implied. | ||
* | ||
* Fractional Synthesizer clock implementation | ||
*/ | ||
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#define pr_fmt(fmt) "clk-frac-synth: " fmt | ||
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#include <linux/clk-provider.h> | ||
#include <linux/slab.h> | ||
#include <linux/io.h> | ||
#include <linux/err.h> | ||
#include "clk.h" | ||
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#define DIV_FACTOR_MASK 0x1FFFF | ||
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/* | ||
* DOC: Fractional Synthesizer clock | ||
* | ||
* Fout from synthesizer can be given from below equation: | ||
* | ||
* Fout= Fin/2*div (division factor) | ||
* div is 17 bits:- | ||
* 0-13 (fractional part) | ||
* 14-16 (integer part) | ||
* div is (16-14 bits).(13-0 bits) (in binary) | ||
* | ||
* Fout = Fin/(2 * div) | ||
* Fout = ((Fin / 10000)/(2 * div)) * 10000 | ||
* Fout = (2^14 * (Fin / 10000)/(2^14 * (2 * div))) * 10000 | ||
* Fout = (((Fin / 10000) << 14)/(2 * (div << 14))) * 10000 | ||
* | ||
* div << 14 simply 17 bit value written at register. | ||
* Max error due to scaling down by 10000 is 10 KHz | ||
*/ | ||
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#define to_clk_frac(_hw) container_of(_hw, struct clk_frac, hw) | ||
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static unsigned long frac_calc_rate(struct clk_hw *hw, unsigned long prate, | ||
int index) | ||
{ | ||
struct clk_frac *frac = to_clk_frac(hw); | ||
struct frac_rate_tbl *rtbl = frac->rtbl; | ||
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prate /= 10000; | ||
prate <<= 14; | ||
prate /= (2 * rtbl[index].div); | ||
prate *= 10000; | ||
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return prate; | ||
} | ||
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static long clk_frac_round_rate(struct clk_hw *hw, unsigned long drate, | ||
unsigned long *prate) | ||
{ | ||
struct clk_frac *frac = to_clk_frac(hw); | ||
int unused; | ||
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return clk_round_rate_index(hw, drate, *prate, frac_calc_rate, | ||
frac->rtbl_cnt, &unused); | ||
} | ||
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static unsigned long clk_frac_recalc_rate(struct clk_hw *hw, | ||
unsigned long parent_rate) | ||
{ | ||
struct clk_frac *frac = to_clk_frac(hw); | ||
unsigned long flags = 0; | ||
unsigned int div = 1, val; | ||
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if (frac->lock) | ||
spin_lock_irqsave(frac->lock, flags); | ||
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val = readl_relaxed(frac->reg); | ||
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if (frac->lock) | ||
spin_unlock_irqrestore(frac->lock, flags); | ||
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div = val & DIV_FACTOR_MASK; | ||
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if (!div) | ||
return 0; | ||
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parent_rate = parent_rate / 10000; | ||
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parent_rate = (parent_rate << 14) / (2 * div); | ||
return parent_rate * 10000; | ||
} | ||
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/* Configures new clock rate of frac */ | ||
static int clk_frac_set_rate(struct clk_hw *hw, unsigned long drate, | ||
unsigned long prate) | ||
{ | ||
struct clk_frac *frac = to_clk_frac(hw); | ||
struct frac_rate_tbl *rtbl = frac->rtbl; | ||
unsigned long flags = 0, val; | ||
int i; | ||
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clk_round_rate_index(hw, drate, prate, frac_calc_rate, frac->rtbl_cnt, | ||
&i); | ||
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if (frac->lock) | ||
spin_lock_irqsave(frac->lock, flags); | ||
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val = readl_relaxed(frac->reg) & ~DIV_FACTOR_MASK; | ||
val |= rtbl[i].div & DIV_FACTOR_MASK; | ||
writel_relaxed(val, frac->reg); | ||
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if (frac->lock) | ||
spin_unlock_irqrestore(frac->lock, flags); | ||
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return 0; | ||
} | ||
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struct clk_ops clk_frac_ops = { | ||
.recalc_rate = clk_frac_recalc_rate, | ||
.round_rate = clk_frac_round_rate, | ||
.set_rate = clk_frac_set_rate, | ||
}; | ||
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struct clk *clk_register_frac(const char *name, const char *parent_name, | ||
unsigned long flags, void __iomem *reg, | ||
struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock) | ||
{ | ||
struct clk_init_data init; | ||
struct clk_frac *frac; | ||
struct clk *clk; | ||
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if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) { | ||
pr_err("Invalid arguments passed"); | ||
return ERR_PTR(-EINVAL); | ||
} | ||
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frac = kzalloc(sizeof(*frac), GFP_KERNEL); | ||
if (!frac) { | ||
pr_err("could not allocate frac clk\n"); | ||
return ERR_PTR(-ENOMEM); | ||
} | ||
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/* struct clk_frac assignments */ | ||
frac->reg = reg; | ||
frac->rtbl = rtbl; | ||
frac->rtbl_cnt = rtbl_cnt; | ||
frac->lock = lock; | ||
frac->hw.init = &init; | ||
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init.name = name; | ||
init.ops = &clk_frac_ops; | ||
init.flags = flags; | ||
init.parent_names = &parent_name; | ||
init.num_parents = 1; | ||
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clk = clk_register(NULL, &frac->hw); | ||
if (!IS_ERR_OR_NULL(clk)) | ||
return clk; | ||
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pr_err("clk register failed\n"); | ||
kfree(frac); | ||
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return NULL; | ||
} |
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