---

yaml
---
r: 281743
b: refs/heads/master
c: 76d6717
h: refs/heads/master
i:
  281741: d28b7da
  281739: 360a9b7
  281735: 67bc9e9
  281727: 0c0bbeb
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 559f7a0346a48af91f6127677c843d0182ac0715
+refs/heads/master: 76d6717bce0e725b280ca18b42725421774eb554

trunk/arch/arm/mach-ux500/board-mop500-sdi.c

@@ -131,6 +131,42 @@ void mop500_sdi_tc35892_init(void)
 	sdi0_configure();
 }
 
+/*
+ * SDI1 (SDIO WLAN)
+ */
+#ifdef CONFIG_STE_DMA40
+static struct stedma40_chan_cfg sdi1_dma_cfg_rx = {
+	.mode = STEDMA40_MODE_LOGICAL,
+	.dir = STEDMA40_PERIPH_TO_MEM,
+	.src_dev_type = DB8500_DMA_DEV32_SD_MM1_RX,
+	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
+	.src_info.data_width = STEDMA40_WORD_WIDTH,
+	.dst_info.data_width = STEDMA40_WORD_WIDTH,
+};
+
+static struct stedma40_chan_cfg sdi1_dma_cfg_tx = {
+	.mode = STEDMA40_MODE_LOGICAL,
+	.dir = STEDMA40_MEM_TO_PERIPH,
+	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
+	.dst_dev_type = DB8500_DMA_DEV32_SD_MM1_TX,
+	.src_info.data_width = STEDMA40_WORD_WIDTH,
+	.dst_info.data_width = STEDMA40_WORD_WIDTH,
+};
+#endif
+
+static struct mmci_platform_data mop500_sdi1_data = {
+	.ocr_mask	= MMC_VDD_29_30,
+	.f_max		= 50000000,
+	.capabilities	= MMC_CAP_4_BIT_DATA,
+	.gpio_cd	= -1,
+	.gpio_wp	= -1,
+#ifdef CONFIG_STE_DMA40
+	.dma_filter	= stedma40_filter,
+	.dma_rx_param	= &sdi1_dma_cfg_rx,
+	.dma_tx_param	= &sdi1_dma_cfg_tx,
+#endif
+};
+
 /*
  * SDI 2 (POP eMMC, not on DB8500ed)
  */
@@ -260,4 +296,6 @@ void __init hrefv60_sdi_init(void)
 	sdi0_en = HREFV60_SDMMC_EN_GPIO;
 	sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
 	sdi0_configure();
+
+	db8500_add_sdi1(&mop500_sdi1_data, periphid);
 }