Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-…

…linus * 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits) [MIPS] Jazz: disable PIT; cleanup R4030 clockevent [MIPS] Bigsur supports highmem. [MIPS] mtx-1: Enable -Werror. [MIPS] mtx-1: Remove unused mtx1_sys_btn. [MIPS] Pb1200: Enable -Werror. [MIPS] Fix and cleanup the MIPS part of the (ab)use of CLOCK_TICK_RATE. [MIPS] SNI: register a02r clockevent; don't use PIT timer [MIPS] i8253.h: Remove all i8259 related definitions. [MIPS] i8253: Cleanup. [MIPS] Cobalt: Fix IRQ comment; the Cobalt kernel uses CP0 counter now. [MIPS] Pb1200: Fix warning. [MIPS] Pb1200: Fix warning. [MIPS] IP27: Fix build error. [MIPS] Excite: Fix build error. [MIPS] Sibyte: Split and move clock code. [MIPS] Sibyte: Fixes for oneshot timer mode. [MIPS] Sibyte: Remove blank line. [MIPS] Swarm: Fix build failure [MIPS] time: Code cleanups [MIPS] time: Remove now unused local_timer_interrupt. ...
git-mirror · Nov 3, 2007 · 29dd5a7 · 29dd5a7
2 parents 71527bf + 3be51f7
commit 29dd5a7
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Showing 33 changed files with 575 additions and 645 deletions.
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
@@ -546,6 +546,7 @@ config SIBYTE_BIGSUR
 	select SWAP_IO_SPACE
 	select SYS_HAS_CPU_SB1
 	select SYS_SUPPORTS_BIG_ENDIAN
+	select SYS_SUPPORTS_HIGHMEM
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 config SNI_RM
@@ -733,15 +734,27 @@ config ARCH_MAY_HAVE_PC_FDC
 config BOOT_RAW
 	bool
 
+config CEVT_BCM1480
+	bool
+
 config CEVT_GT641XX
 	bool
 
 config CEVT_R4K
 	bool
 
+config CEVT_SB1250
+	bool
+
 config CEVT_TXX9
 	bool
 
+config CSRC_BCM1480
+	bool
+
+config CSRC_SB1250
+	bool
+
 config CFE
 	bool
 

diff --git a/arch/mips/au1000/mtx-1/Makefile b/arch/mips/au1000/mtx-1/Makefile
@@ -9,3 +9,5 @@
 
 lib-y := init.o board_setup.o irqmap.o
 obj-y := platform.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/au1000/mtx-1/platform.c b/arch/mips/au1000/mtx-1/platform.c
@@ -34,15 +34,6 @@ static struct resource mtx1_wdt_res[] = {
 	}
 };
 
-static struct resource mtx1_sys_btn[] = {
-	[0] = {
-		.start	= 7,
-		.end	= 7,
-		.name	= "mtx1-sys-btn-gpio",
-		.flags	= IORESOURCE_IRQ,
-	}
-};
-
 static struct platform_device mtx1_wdt = {
 	.name = "mtx1-wdt",
 	.id = 0,

diff --git a/arch/mips/au1000/pb1200/Makefile b/arch/mips/au1000/pb1200/Makefile
@@ -3,3 +3,5 @@
 #
 
 lib-y := init.o board_setup.o irqmap.o
+
+EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/au1000/pb1200/board_setup.c b/arch/mips/au1000/pb1200/board_setup.c
@@ -68,9 +68,11 @@ void board_reset(void)
 void __init board_setup(void)
 {
 	char *argptr = NULL;
-	u32 pin_func;
 
 #if 0
+	{
+	u32 pin_func;
+
 	/* Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
 	 * but it is board specific code, so put it here.
 	 */
@@ -81,11 +83,13 @@ void __init board_setup(void)
 
 	au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
 	au_sync();
+	}
 #endif
 
 #if defined(CONFIG_I2C_AU1550)
 	{
 	u32 freq0, clksrc;
+	u32 pin_func;
 
 	/* Select SMBUS in CPLD */
 	bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);

diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c
@@ -94,51 +94,41 @@ inline void pb1200_disable_irq(unsigned int irq_nr)
 	bcsr->intclr = 1<<(irq_nr - PB1200_INT_BEGIN);
 }
 
-static unsigned int pb1200_startup_irq( unsigned int irq_nr )
+static unsigned int pb1200_setup_cascade(void)
 {
-	if (++pb1200_cascade_en == 1)
-	{
-		request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
-			0, "Pb1200 Cascade", (void *)&pb1200_cascade_handler );
-#ifdef CONFIG_MIPS_PB1200
-    /* We have a problem with CPLD rev3. Enable a workaround */
-	if( ((bcsr->whoami & BCSR_WHOAMI_CPLD)>>4) <= 3)
-	{
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
-		printk("updated to latest revision. This software will not\n");
-		printk("work on anything less than CPLD rev4\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		printk("\nWARNING!!!\n");
-		while(1);
-	}
-#endif
-	}
-	pb1200_enable_irq(irq_nr);
+	int err;
+
+	err = request_irq(AU1000_GPIO_7, &pb1200_cascade_handler,
+			  0, "Pb1200 Cascade", &pb1200_cascade_handler);
+	if (err)
+		return err;
+
 	return 0;
 }
 
-static void pb1200_shutdown_irq( unsigned int irq_nr )
+static unsigned int pb1200_startup_irq(unsigned int irq)
 {
-	pb1200_disable_irq(irq_nr);
-	if (--pb1200_cascade_en == 0)
-	{
-		free_irq(AU1000_GPIO_7, &pb1200_cascade_handler );
+	if (++pb1200_cascade_en == 1) {
+		int res;
+
+		res = pb1200_setup_cascade();
+		if (res)
+			return res;
 	}
-	return;
+
+	pb1200_enable_irq(irq);
+
+	return 0;
 }
 
-static struct irq_chip external_irq_type =
+static void pb1200_shutdown_irq(unsigned int irq)
 {
+	pb1200_disable_irq(irq);
+	if (--pb1200_cascade_en == 0)
+		free_irq(AU1000_GPIO_7, &pb1200_cascade_handler);
+}
+
+static struct irq_chip external_irq_type = {
 #ifdef CONFIG_MIPS_PB1200
 	.name = "Pb1200 Ext",
 #endif
@@ -155,16 +145,38 @@ static struct irq_chip external_irq_type =
 
 void _board_init_irq(void)
 {
-	int irq_nr;
+	unsigned int irq;
 
-	for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++)
-	{
-		set_irq_chip_and_handler(irq_nr, &external_irq_type,
+#ifdef CONFIG_MIPS_PB1200
+	/* We have a problem with CPLD rev3. Enable a workaround */
+	if (((bcsr->whoami & BCSR_WHOAMI_CPLD) >> 4) <= 3) {
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("Pb1200 must be at CPLD rev4. Please have Pb1200\n");
+		printk("updated to latest revision. This software will not\n");
+		printk("work on anything less than CPLD rev4\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		printk("\nWARNING!!!\n");
+		panic("Game over.  Your score is 0.");
+	}
+#endif
+
+	for (irq = PB1200_INT_BEGIN; irq <= PB1200_INT_END; irq++) {
+		set_irq_chip_and_handler(irq, &external_irq_type,
 					 handle_level_irq);
-		pb1200_disable_irq(irq_nr);
+		pb1200_disable_irq(irq);
 	}
 
-	/* GPIO_7 can not be hooked here, so it is hooked upon first
-	request of any source attached to the cascade */
+	/*
+	 * GPIO_7 can not be hooked here, so it is hooked upon first
+	 * request of any source attached to the cascade
+	 */
 }
-
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c
@@ -77,7 +77,7 @@ int titan_irqflags;
 void __init plat_time_init(void)
 {
 	const u32 modebit5 = ocd_readl(0x00e4);
-	unsigned int mult = ((modebit5 >> 11) & 0x1f) + 2,
+	unsigned int mult = ((modebit5 >> 11) & 0x1f) + 2;
 	unsigned int div = ((modebit5 >> 16) & 0x1f) + 2;
 
 	if (div == 33)

diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
@@ -97,9 +97,10 @@ asmlinkage void plat_irq_dispatch(void)
 	if (pending & IE_IRQ4) {
 		r4030_read_reg32(JAZZ_TIMER_REGISTER);
 		do_IRQ(JAZZ_TIMER_IRQ);
-	} else if (pending & IE_IRQ2)
-		do_IRQ(r4030_read_reg32(JAZZ_EISA_IRQ_ACK));
-	else if (pending & IE_IRQ1) {
+	} else if (pending & IE_IRQ2) {
+		irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK;
+		do_IRQ(irq);
+	} else if (pending & IE_IRQ1) {
 		irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
 		if (likely(irq > 0))
 			do_IRQ(irq + JAZZ_IRQ_START - 1);
@@ -117,41 +118,45 @@ static void r4030_set_mode(enum clock_event_mode mode,
 struct clock_event_device r4030_clockevent = {
 	.name		= "r4030",
 	.features	= CLOCK_EVT_FEAT_PERIODIC,
-	.rating		= 100,
+	.rating		= 300,
 	.irq		= JAZZ_TIMER_IRQ,
-	.cpumask	= CPU_MASK_CPU0,
 	.set_mode	= r4030_set_mode,
 };
 
 static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
 {
-	r4030_clockevent.event_handler(&r4030_clockevent);
+	struct clock_event_device *cd = dev_id;
 
+	cd->event_handler(cd);
 	return IRQ_HANDLED;
 }
 
 static struct irqaction r4030_timer_irqaction = {
 	.handler	= r4030_timer_interrupt,
 	.flags		= IRQF_DISABLED,
 	.mask		= CPU_MASK_CPU0,
-	.name		= "timer",
+	.name		= "R4030 timer",
 };
 
 void __init plat_time_init(void)
 {
-	struct irqaction *irq = &r4030_timer_irqaction;
+	struct clock_event_device *cd = &r4030_clockevent;
+	struct irqaction *action = &r4030_timer_irqaction;
+	unsigned int cpu = smp_processor_id();
 
 	BUG_ON(HZ != 100);
 
+	cd->cpumask             = cpumask_of_cpu(cpu);
+	clockevents_register_device(cd);
+	action->dev_id = cd;
+	setup_irq(JAZZ_TIMER_IRQ, action);
+
 	/*
 	 * Set clock to 100Hz.
 	 *
 	 * The R4030 timer receives an input clock of 1kHz which is divieded by
 	 * a programmable 4-bit divider.  This makes it fairly inflexible.
 	 */
 	r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
-	setup_irq(JAZZ_TIMER_IRQ, irq);
-
-	clockevents_register_device(&r4030_clockevent);
 	setup_pit_timer();
 }
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
@@ -8,9 +8,13 @@ obj-y		+= cpu-probe.o branch.o entry.o genex.o irq.o process.o \
 		   ptrace.o reset.o semaphore.o setup.o signal.o syscall.o \
 		   time.o topology.o traps.o unaligned.o
 
+obj-$(CONFIG_CEVT_BCM1480)	+= cevt-bcm1480.o
 obj-$(CONFIG_CEVT_R4K)		+= cevt-r4k.o
 obj-$(CONFIG_CEVT_GT641XX)	+= cevt-gt641xx.o
+obj-$(CONFIG_CEVT_SB1250)	+= cevt-sb1250.o
 obj-$(CONFIG_CEVT_TXX9)		+= cevt-txx9.o
+obj-$(CONFIG_CSRC_BCM1480)	+= csrc-bcm1480.o
+obj-$(CONFIG_CSRC_SB1250)	+= csrc-sb1250.o
 
 binfmt_irix-objs	:= irixelf.o irixinv.o irixioctl.o irixsig.o	\
 			   irix5sys.o sysirix.o
Original file line number	Diff line number	Diff line change
Expand Up		@@ -9,3 +9,5 @@

		lib-y := init.o board_setup.o irqmap.o
		obj-y := platform.o

		EXTRA_CFLAGS += -Werror
Original file line number	Diff line number	Diff line change
Expand Up		@@ -3,3 +3,5 @@
		#

		lib-y := init.o board_setup.o irqmap.o

		EXTRA_CFLAGS += -Werror