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yaml
---
r: 345400
b: refs/heads/master
c: 47a1e0f
h: refs/heads/master
v: v3
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Ben Skeggs committed Nov 28, 2012
1 parent 26841b8 commit 2a27b1f
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Showing 3 changed files with 44 additions and 2 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 80fe155ba6844f3cf2f083cbd34be12bb391ec4a
refs/heads/master: 47a1e0fe4bbef313e85660547c0935eb70769632
35 changes: 34 additions & 1 deletion trunk/drivers/gpu/drm/nouveau/core/engine/dmaobj/nvd0.c
Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,8 @@ nvd0_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
struct nouveau_dmaobj *dmaobj,
struct nouveau_gpuobj **pgpuobj)
{
int ret = 0;
u32 flags0 = 0x00000000;
int ret;

if (!nv_iclass(parent, NV_ENGCTX_CLASS)) {
switch (nv_mclass(parent->parent)) {
Expand All @@ -50,6 +51,38 @@ nvd0_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
} else
return 0;

if (!(dmaobj->conf0 & NVD0_DMA_CONF0_ENABLE)) {
if (dmaobj->target == NV_MEM_TARGET_VM) {
dmaobj->conf0 |= NVD0_DMA_CONF0_TYPE_VM;
dmaobj->conf0 |= NVD0_DMA_CONF0_PAGE_LP;
} else {
dmaobj->conf0 |= NVD0_DMA_CONF0_TYPE_LINEAR;
dmaobj->conf0 |= NVD0_DMA_CONF0_PAGE_SP;
}
}

flags0 |= (dmaobj->conf0 & NVD0_DMA_CONF0_TYPE) << 20;
flags0 |= (dmaobj->conf0 & NVD0_DMA_CONF0_PAGE) >> 4;

switch (dmaobj->target) {
case NV_MEM_TARGET_VRAM:
flags0 |= 0x00000009;
break;
default:
return -EINVAL;
break;
}

ret = nouveau_gpuobj_new(parent, parent, 24, 32, 0, pgpuobj);
if (ret == 0) {
nv_wo32(*pgpuobj, 0x00, flags0);
nv_wo32(*pgpuobj, 0x04, dmaobj->start >> 8);
nv_wo32(*pgpuobj, 0x08, dmaobj->limit >> 8);
nv_wo32(*pgpuobj, 0x0c, 0x00000000);
nv_wo32(*pgpuobj, 0x10, 0x00000000);
nv_wo32(*pgpuobj, 0x14, 0x00000000);
}

return ret;
}

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9 changes: 9 additions & 0 deletions trunk/drivers/gpu/drm/nouveau/core/include/core/class.h
Original file line number Diff line number Diff line change
Expand Up @@ -80,6 +80,15 @@ struct nv_device_class {
#define NVC0_DMA_CONF0_TYPE_LINEAR 0x00000000
#define NVC0_DMA_CONF0_TYPE_VM 0x000000ff

/* NVD9- */
#define NVD0_DMA_CONF0_ENABLE 0x80000000
#define NVD0_DMA_CONF0_PAGE 0x00000400
#define NVD0_DMA_CONF0_PAGE_LP 0x00000000
#define NVD0_DMA_CONF0_PAGE_SP 0x00000400
#define NVD0_DMA_CONF0_TYPE 0x000000ff
#define NVD0_DMA_CONF0_TYPE_LINEAR 0x00000000
#define NVD0_DMA_CONF0_TYPE_VM 0x000000ff

struct nv_dma_class {
u32 flags;
u32 pad0;
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