Skip to content

Commit

Permalink
dt-bindings: soc: Add clocks for Mediatek SCPSYS unit
Browse files Browse the repository at this point in the history
Add clocks needed by Mediatek VENC and VENC_LT power domianis.
These clocks were needed by accessing subsystem's registers,
so they need to be enabled before power on these subsystems.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
  • Loading branch information
James Liao authored and Matthias Brugger committed Oct 12, 2015
1 parent 013f2a2 commit 2a4599a
Showing 1 changed file with 6 additions and 4 deletions.
10 changes: 6 additions & 4 deletions Documentation/devicetree/bindings/soc/mediatek/scpsys.txt
Original file line number Diff line number Diff line change
Expand Up @@ -17,9 +17,9 @@ Required properties:
- reg: Address range of the SCPSYS unit
- infracfg: must contain a phandle to the infracfg controller
- clock, clock-names: clocks according to the common clock binding.
The clocks needed "mm" and "mfg". These are the
clocks which hardware needs to be enabled before
enabling certain power domains.
The clocks needed "mm", "mfg", "venc" and "venc_lt".
These are the clocks which hardware needs to be enabled
before enabling certain power domains.

Example:

Expand All @@ -30,7 +30,9 @@ Example:
infracfg = <&infracfg>;
clocks = <&clk26m>,
<&topckgen CLK_TOP_MM_SEL>;
clock-names = "mfg", "mm";
<&topckgen CLK_TOP_VENC_SEL>,
<&topckgen CLK_TOP_VENC_LT_SEL>;
clock-names = "mfg", "mm", "venc", "venc_lt";
};

Example consumer:
Expand Down

0 comments on commit 2a4599a

Please sign in to comment.