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ARM: SAMSUNG: Remove uart irq handling from plaform code
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With uart tx/rx/err interrupt handling moved into the driver for s3c64xx
and later SoC's, the uart interrupt handling in plaform code can be removed.
The uart device irq resources is reduced to one and the related unused
macros are removed.

Suggested-by: Grant Likely <grant.likely@secretlab.ca>
CC: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Thomas Abraham authored and Greg Kroah-Hartman committed Aug 23, 2011
1 parent 88bb4ea commit 2a8d7bd
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Showing 12 changed files with 25 additions and 352 deletions.
1 change: 0 additions & 1 deletion arch/arm/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -722,7 +722,6 @@ config ARCH_S3C64XX
select ARCH_REQUIRE_GPIOLIB
select SAMSUNG_CLKSRC
select SAMSUNG_IRQ_VIC_TIMER
select SAMSUNG_IRQ_UART
select S3C_GPIO_TRACK
select S3C_GPIO_PULL_UPDOWN
select S3C_GPIO_CFG_S3C24XX
Expand Down
60 changes: 8 additions & 52 deletions arch/arm/mach-s3c64xx/dev-uart.c
Original file line number Diff line number Diff line change
Expand Up @@ -37,21 +37,10 @@ static struct resource s3c64xx_uart0_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3CUART_RX0,
.end = IRQ_S3CUART_RX0,
.start = IRQ_UART0,
.end = IRQ_UART0,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S3CUART_TX0,
.end = IRQ_S3CUART_TX0,
.flags = IORESOURCE_IRQ,

},
[3] = {
.start = IRQ_S3CUART_ERR0,
.end = IRQ_S3CUART_ERR0,
.flags = IORESOURCE_IRQ,
}
};

static struct resource s3c64xx_uart1_resource[] = {
Expand All @@ -61,19 +50,8 @@ static struct resource s3c64xx_uart1_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3CUART_RX1,
.end = IRQ_S3CUART_RX1,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S3CUART_TX1,
.end = IRQ_S3CUART_TX1,
.flags = IORESOURCE_IRQ,

},
[3] = {
.start = IRQ_S3CUART_ERR1,
.end = IRQ_S3CUART_ERR1,
.start = IRQ_UART1,
.end = IRQ_UART1,
.flags = IORESOURCE_IRQ,
},
};
Expand All @@ -85,19 +63,8 @@ static struct resource s3c6xx_uart2_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3CUART_RX2,
.end = IRQ_S3CUART_RX2,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S3CUART_TX2,
.end = IRQ_S3CUART_TX2,
.flags = IORESOURCE_IRQ,

},
[3] = {
.start = IRQ_S3CUART_ERR2,
.end = IRQ_S3CUART_ERR2,
.start = IRQ_UART2,
.end = IRQ_UART2,
.flags = IORESOURCE_IRQ,
},
};
Expand All @@ -109,19 +76,8 @@ static struct resource s3c64xx_uart3_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S3CUART_RX3,
.end = IRQ_S3CUART_RX3,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S3CUART_TX3,
.end = IRQ_S3CUART_TX3,
.flags = IORESOURCE_IRQ,

},
[3] = {
.start = IRQ_S3CUART_ERR3,
.end = IRQ_S3CUART_ERR3,
.start = IRQ_UART3,
.end = IRQ_UART3,
.flags = IORESOURCE_IRQ,
},
};
Expand Down
30 changes: 0 additions & 30 deletions arch/arm/mach-s3c64xx/include/mach/irqs.h
Original file line number Diff line number Diff line change
Expand Up @@ -27,36 +27,6 @@
#define IRQ_VIC0_BASE S3C_IRQ(0)
#define IRQ_VIC1_BASE S3C_IRQ(32)

/* UART interrupts, each UART has 4 intterupts per channel so
* use the space between the ISA and S3C main interrupts. Note, these
* are not in the same order as the S3C24XX series! */

#define IRQ_S3CUART_BASE0 (16)
#define IRQ_S3CUART_BASE1 (20)
#define IRQ_S3CUART_BASE2 (24)
#define IRQ_S3CUART_BASE3 (28)

#define UART_IRQ_RXD (0)
#define UART_IRQ_ERR (1)
#define UART_IRQ_TXD (2)
#define UART_IRQ_MODEM (3)

#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD)
#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD)
#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR)

#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD)
#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD)
#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR)

#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD)
#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD)
#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR)

#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD)
#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD)
#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR)

/* VIC based IRQs */

#define S3C64XX_IRQ_VIC0(x) (IRQ_VIC0_BASE + (x))
Expand Down
25 changes: 0 additions & 25 deletions arch/arm/mach-s3c64xx/irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -25,29 +25,6 @@
#include <plat/irq-uart.h>
#include <plat/cpu.h>

static struct s3c_uart_irq uart_irqs[] = {
[0] = {
.regs = S3C_VA_UART0,
.base_irq = IRQ_S3CUART_BASE0,
.parent_irq = IRQ_UART0,
},
[1] = {
.regs = S3C_VA_UART1,
.base_irq = IRQ_S3CUART_BASE1,
.parent_irq = IRQ_UART1,
},
[2] = {
.regs = S3C_VA_UART2,
.base_irq = IRQ_S3CUART_BASE2,
.parent_irq = IRQ_UART2,
},
[3] = {
.regs = S3C_VA_UART3,
.base_irq = IRQ_S3CUART_BASE3,
.parent_irq = IRQ_UART3,
},
};

/* setup the sources the vic should advertise resume for, even though it
* is not doing the wake (set_irq_wake needs to be valid) */
#define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
Expand All @@ -67,6 +44,4 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)

/* add the timer sub-irqs */
s3c_init_vic_timer_irq(5, IRQ_TIMER0);

s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
}
1 change: 0 additions & 1 deletion arch/arm/plat-s5p/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,6 @@ config PLAT_S5P
select PLAT_SAMSUNG
select SAMSUNG_CLKSRC
select SAMSUNG_IRQ_VIC_TIMER
select SAMSUNG_IRQ_UART
help
Base platform code for Samsung's S5P series SoC.

Expand Down
84 changes: 12 additions & 72 deletions arch/arm/plat-s5p/dev-uart.c
Original file line number Diff line number Diff line change
Expand Up @@ -32,20 +32,10 @@ static struct resource s5p_uart0_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S5P_UART_RX0,
.end = IRQ_S5P_UART_RX0,
.start = IRQ_UART0,
.end = IRQ_UART0,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S5P_UART_TX0,
.end = IRQ_S5P_UART_TX0,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = IRQ_S5P_UART_ERR0,
.end = IRQ_S5P_UART_ERR0,
.flags = IORESOURCE_IRQ,
}
};

static struct resource s5p_uart1_resource[] = {
Expand All @@ -55,18 +45,8 @@ static struct resource s5p_uart1_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S5P_UART_RX1,
.end = IRQ_S5P_UART_RX1,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S5P_UART_TX1,
.end = IRQ_S5P_UART_TX1,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = IRQ_S5P_UART_ERR1,
.end = IRQ_S5P_UART_ERR1,
.start = IRQ_UART1,
.end = IRQ_UART1,
.flags = IORESOURCE_IRQ,
},
};
Expand All @@ -78,18 +58,8 @@ static struct resource s5p_uart2_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S5P_UART_RX2,
.end = IRQ_S5P_UART_RX2,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S5P_UART_TX2,
.end = IRQ_S5P_UART_TX2,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = IRQ_S5P_UART_ERR2,
.end = IRQ_S5P_UART_ERR2,
.start = IRQ_UART2,
.end = IRQ_UART2,
.flags = IORESOURCE_IRQ,
},
};
Expand All @@ -102,18 +72,8 @@ static struct resource s5p_uart3_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S5P_UART_RX3,
.end = IRQ_S5P_UART_RX3,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S5P_UART_TX3,
.end = IRQ_S5P_UART_TX3,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = IRQ_S5P_UART_ERR3,
.end = IRQ_S5P_UART_ERR3,
.start = IRQ_UART3,
.end = IRQ_UART3,
.flags = IORESOURCE_IRQ,
},
#endif
Expand All @@ -127,18 +87,8 @@ static struct resource s5p_uart4_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S5P_UART_RX4,
.end = IRQ_S5P_UART_RX4,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S5P_UART_TX4,
.end = IRQ_S5P_UART_TX4,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = IRQ_S5P_UART_ERR4,
.end = IRQ_S5P_UART_ERR4,
.start = IRQ_UART4,
.end = IRQ_UART4,
.flags = IORESOURCE_IRQ,
},
#endif
Expand All @@ -152,18 +102,8 @@ static struct resource s5p_uart5_resource[] = {
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_S5P_UART_RX5,
.end = IRQ_S5P_UART_RX5,
.flags = IORESOURCE_IRQ,
},
[2] = {
.start = IRQ_S5P_UART_TX5,
.end = IRQ_S5P_UART_TX5,
.flags = IORESOURCE_IRQ,
},
[3] = {
.start = IRQ_S5P_UART_ERR5,
.end = IRQ_S5P_UART_ERR5,
.start = IRQ_UART5,
.end = IRQ_UART5,
.flags = IORESOURCE_IRQ,
},
#endif
Expand Down
35 changes: 0 additions & 35 deletions arch/arm/plat-s5p/include/plat/irqs.h
Original file line number Diff line number Diff line change
Expand Up @@ -37,41 +37,6 @@
#define IRQ_VIC1_BASE S5P_VIC1_BASE
#define IRQ_VIC2_BASE S5P_VIC2_BASE

/* UART interrupts, each UART has 4 intterupts per channel so
* use the space between the ISA and S3C main interrupts. Note, these
* are not in the same order as the S3C24XX series! */

#define IRQ_S5P_UART_BASE0 (16)
#define IRQ_S5P_UART_BASE1 (20)
#define IRQ_S5P_UART_BASE2 (24)
#define IRQ_S5P_UART_BASE3 (28)

#define UART_IRQ_RXD (0)
#define UART_IRQ_ERR (1)
#define UART_IRQ_TXD (2)

#define IRQ_S5P_UART_RX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_RXD)
#define IRQ_S5P_UART_TX0 (IRQ_S5P_UART_BASE0 + UART_IRQ_TXD)
#define IRQ_S5P_UART_ERR0 (IRQ_S5P_UART_BASE0 + UART_IRQ_ERR)

#define IRQ_S5P_UART_RX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_RXD)
#define IRQ_S5P_UART_TX1 (IRQ_S5P_UART_BASE1 + UART_IRQ_TXD)
#define IRQ_S5P_UART_ERR1 (IRQ_S5P_UART_BASE1 + UART_IRQ_ERR)

#define IRQ_S5P_UART_RX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_RXD)
#define IRQ_S5P_UART_TX2 (IRQ_S5P_UART_BASE2 + UART_IRQ_TXD)
#define IRQ_S5P_UART_ERR2 (IRQ_S5P_UART_BASE2 + UART_IRQ_ERR)

#define IRQ_S5P_UART_RX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_RXD)
#define IRQ_S5P_UART_TX3 (IRQ_S5P_UART_BASE3 + UART_IRQ_TXD)
#define IRQ_S5P_UART_ERR3 (IRQ_S5P_UART_BASE3 + UART_IRQ_ERR)

/* S3C compatibilty defines */
#define IRQ_S3CUART_RX0 IRQ_S5P_UART_RX0
#define IRQ_S3CUART_RX1 IRQ_S5P_UART_RX1
#define IRQ_S3CUART_RX2 IRQ_S5P_UART_RX2
#define IRQ_S3CUART_RX3 IRQ_S5P_UART_RX3

/* VIC based IRQs */

#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
Expand Down
34 changes: 0 additions & 34 deletions arch/arm/plat-s5p/irq.c
Original file line number Diff line number Diff line change
Expand Up @@ -17,42 +17,10 @@

#include <asm/hardware/vic.h>

#include <linux/serial_core.h>
#include <mach/map.h>
#include <plat/regs-timer.h>
#include <plat/regs-serial.h>
#include <plat/cpu.h>
#include <plat/irq-vic-timer.h>
#include <plat/irq-uart.h>

/*
* Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
* are consecutive when looking up the interrupt in the demux routines.
*/
static struct s3c_uart_irq uart_irqs[] = {
[0] = {
.regs = S5P_VA_UART0,
.base_irq = IRQ_S5P_UART_BASE0,
.parent_irq = IRQ_UART0,
},
[1] = {
.regs = S5P_VA_UART1,
.base_irq = IRQ_S5P_UART_BASE1,
.parent_irq = IRQ_UART1,
},
[2] = {
.regs = S5P_VA_UART2,
.base_irq = IRQ_S5P_UART_BASE2,
.parent_irq = IRQ_UART2,
},
#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
[3] = {
.regs = S5P_VA_UART3,
.base_irq = IRQ_S5P_UART_BASE3,
.parent_irq = IRQ_UART3,
},
#endif
};

void __init s5p_init_irq(u32 *vic, u32 num_vic)
{
Expand All @@ -65,6 +33,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
#endif

s3c_init_vic_timer_irq(5, IRQ_TIMER0);

s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
}
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