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yaml --- r: 62846 b: refs/heads/master c: 55c4499 h: refs/heads/master v: v3
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Roy Zang
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Kumar Gala
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Jul 23, 2007
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--- | ||
refs/heads/master: 3836df6b520a2f93033bf53200b12a2cb5137395 | ||
refs/heads/master: 55c44991e2910519bab274c857d95a08100ff5f7 |
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/* | ||
* This file is subject to the terms and conditions of the GNU General Public | ||
* License. See the file "COPYING" in the main directory of this archive | ||
* for more details. | ||
* | ||
* Copyright (C) 1996 David S. Miller (dm@sgi.com) | ||
* Compability with board caches, Ulf Carlsson | ||
*/ | ||
#include <linux/kernel.h> | ||
#include <asm/sgialib.h> | ||
#include <asm/bcache.h> | ||
|
||
/* | ||
* IP22 boardcache is not compatible with board caches. Thus we disable it | ||
* during romvec action. Since r4xx0.c is always compiled and linked with your | ||
* kernel, this shouldn't cause any harm regardless what MIPS processor you | ||
* have. | ||
* | ||
* The ARC write and read functions seem to interfere with the serial lines | ||
* in some way. You should be careful with them. | ||
*/ | ||
|
||
void prom_putchar(char c) | ||
{ | ||
ULONG cnt; | ||
CHAR it = c; | ||
|
||
bc_disable(); | ||
ArcWrite(1, &it, 1, &cnt); | ||
bc_enable(); | ||
} |
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