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yaml
---
r: 271606
b: refs/heads/master
c: 26ffaf3
h: refs/heads/master
v: v3
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Yaniv Rosner authored and David S. Miller committed Oct 27, 2011
1 parent a80225f commit 2b1889c
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Showing 2 changed files with 10 additions and 3 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: b903d324bee2627036d024dceed73b3c96558795
refs/heads/master: 26ffaf36c8e0a0eefb6ff031d6166b5ee82eb3de
11 changes: 9 additions & 2 deletions trunk/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,9 @@
#define MCPR_IMC_COMMAND_READ_OP 1
#define MCPR_IMC_COMMAND_WRITE_OP 2

/* LED Blink rate that will achieve ~15.9Hz */
#define LED_BLINK_RATE_VAL_E3 354
#define LED_BLINK_RATE_VAL_E1X_E2 480
/***********************************************************/
/* Shortcut definitions */
/***********************************************************/
Expand Down Expand Up @@ -5954,8 +5957,12 @@ int bnx2x_set_led(struct link_params *params,

REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + port*4, 0);
/* Set blinking rate to ~15.9Hz */
REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4,
LED_BLINK_RATE_VAL);
if (CHIP_IS_E3(bp))
REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4,
LED_BLINK_RATE_VAL_E3);
else
REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4,
LED_BLINK_RATE_VAL_E1X_E2);
REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 +
port*4, 1);
tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
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