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ixp4xx: support omicron ixp425 based boards
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This patch adds board support for the DEVIXP, the MICCPT, and the
MIC256, which are three IXP425 based boards produced by OMICRON
electronics, GmbH.

Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Richard Cochran authored and Arnd Bergmann committed Sep 30, 2011
1 parent ddf2835 commit 2b8f011
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Showing 5 changed files with 376 additions and 1 deletion.
19 changes: 19 additions & 0 deletions arch/arm/mach-ixp4xx/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -179,6 +179,25 @@ config MACH_GTWX5715
"High Speed" UART is n/c (as far as I can tell)
20 Pin ARM/Xscale JTAG interface on J2

config MACH_DEVIXP
bool "Omicron DEVIXP"
help
Say 'Y' here if you want your kernel to support the DEVIXP
board from OMICRON electronics GmbH.

config MACH_MICCPT
bool "Omicron MICCPT"
select PCI
help
Say 'Y' here if you want your kernel to support the MICCPT
board from OMICRON electronics GmbH.

config MACH_MIC256
bool "Omicron MIC256"
help
Say 'Y' here if you want your kernel to support the MIC256
board from OMICRON electronics GmbH.

comment "IXP4xx Options"

config IXP4XX_INDIRECT_PCI
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4 changes: 4 additions & 0 deletions arch/arm/mach-ixp4xx/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
obj-pci-$(CONFIG_MACH_MICCPT) += miccpt-pci.o
obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-pci.o
obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
Expand All @@ -25,6 +26,9 @@ obj-$(CONFIG_MACH_AVILA) += avila-setup.o
obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
obj-$(CONFIG_MACH_DEVIXP) += omixp-setup.o
obj-$(CONFIG_MACH_MICCPT) += omixp-setup.o
obj-$(CONFIG_MACH_MIC256) += omixp-setup.o
obj-$(CONFIG_MACH_NSLU2) += nslu2-setup.o
obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o
obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o
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3 changes: 2 additions & 1 deletion arch/arm/mach-ixp4xx/include/mach/uncompress.h
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,8 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
* Some boards are using UART2 as console
*/
if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
machine_is_gateway7001() || machine_is_wg302v2())
machine_is_gateway7001() || machine_is_wg302v2() ||
machine_is_devixp() || machine_is_miccpt() || machine_is_mic256())
uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
else
uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
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78 changes: 78 additions & 0 deletions arch/arm/mach-ixp4xx/miccpt-pci.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,78 @@
/*
* arch/arm/mach-ixp4xx/miccpt-pci.c
*
* MICCPT board-level PCI initialization
*
* Copyright (C) 2002 Intel Corporation.
* Copyright (C) 2003-2004 MontaVista Software, Inc.
* Copyright (C) 2006 OMICRON electronics GmbH
*
* Author: Michael Jochum <michael.jochum@omicron.at>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/

#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/irq.h>
#include <asm/mach/pci.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

#define MAX_DEV 4
#define IRQ_LINES 4

/* PCI controller GPIO to IRQ pin mappings */
#define INTA 1
#define INTB 2
#define INTC 3
#define INTD 4


void __init miccpt_pci_preinit(void)
{
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}

static int __init miccpt_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
static int pci_irq_table[IRQ_LINES] = {
IXP4XX_GPIO_IRQ(INTA),
IXP4XX_GPIO_IRQ(INTB),
IXP4XX_GPIO_IRQ(INTC),
IXP4XX_GPIO_IRQ(INTD)
};

if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
return pci_irq_table[(slot + pin - 2) % 4];

return -1;
}

struct hw_pci miccpt_pci __initdata = {
.nr_controllers = 1,
.preinit = miccpt_pci_preinit,
.swizzle = pci_std_swizzle,
.setup = ixp4xx_setup,
.scan = ixp4xx_scan_bus,
.map_irq = miccpt_map_irq,
};

int __init miccpt_pci_init(void)
{
if (machine_is_miccpt())
pci_common_init(&miccpt_pci);
return 0;
}

subsys_initcall(miccpt_pci_init);
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