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e1000: reorder pci-e infor struct
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Order pci-e capability struct according to bus/pci bus width ordering
preserving the hard pci spec numbers.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Jeff Kirsher authored and Jeff Garzik committed Dec 2, 2006
1 parent 070f6ff commit 2bc35c1
Showing 1 changed file with 5 additions and 3 deletions.
8 changes: 5 additions & 3 deletions drivers/net/e1000/e1000_hw.h
Original file line number Diff line number Diff line change
Expand Up @@ -128,11 +128,13 @@ typedef enum {
/* PCI bus widths */
typedef enum {
e1000_bus_width_unknown = 0,
/* These PCIe values should literally match the possible return values
* from config space */
e1000_bus_width_pciex_1 = 1,
e1000_bus_width_pciex_2 = 2,
e1000_bus_width_pciex_4 = 4,
e1000_bus_width_32,
e1000_bus_width_64,
e1000_bus_width_pciex_1,
e1000_bus_width_pciex_2,
e1000_bus_width_pciex_4,
e1000_bus_width_reserved
} e1000_bus_width;

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