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drm/i915: Refactor VLV display power well init/deinit
We do the exact same steps around the disp2d/pipe A power well enable/disable on VLV and CHV. Refactor the shared code into some helpers. Note that this means we now call vlv_power_sequencer_reset() before turning off the power well, whereas before we did it after. That doesn't matter though since vlv_power_sequencer_reset() just resets the power sequencer software tracking and doesn't touch the hardware at all. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Ville Syrjälä
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Daniel Vetter
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Jul 13, 2015
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