---

yaml
---
r: 284770
b: refs/heads/master
c: 41dde78
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 876f1166189bcb9493e02a35fd38d143e1b26eee
+refs/heads/master: 41dde781f50c39cddc8032fc04d6a7d538237737

trunk/arch/mips/Kconfig

@@ -716,6 +716,7 @@ config CAVIUM_OCTEON_SIMULATOR
 	select DMA_COHERENT
 	select SYS_SUPPORTS_64BIT_KERNEL
 	select SYS_SUPPORTS_BIG_ENDIAN
+	select SYS_SUPPORTS_HIGHMEM
 	select SYS_SUPPORTS_HOTPLUG_CPU
 	select SYS_HAS_CPU_CAVIUM_OCTEON
 	select HOLES_IN_ZONE
@@ -731,6 +732,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
 	select DMA_COHERENT
 	select SYS_SUPPORTS_64BIT_KERNEL
 	select SYS_SUPPORTS_BIG_ENDIAN
+	select SYS_SUPPORTS_HIGHMEM
 	select SYS_SUPPORTS_HOTPLUG_CPU
 	select SYS_HAS_EARLY_PRINTK
 	select SYS_HAS_CPU_CAVIUM_OCTEON

trunk/arch/mips/cavium-octeon/Kconfig

@@ -86,6 +86,10 @@ config ARCH_SPARSEMEM_ENABLE
 	def_bool y
 	select SPARSEMEM_STATIC
 
+config CAVIUM_OCTEON_HELPER
+	def_bool y
+	depends on OCTEON_ETHERNET || PCI
+
 config IOMMU_HELPER
 	bool
 

trunk/arch/mips/cavium-octeon/dma-octeon.c

@@ -61,16 +61,6 @@ static phys_addr_t octeon_gen1_dma_to_phys(struct device *dev, dma_addr_t daddr)
 	return daddr;
 }
 
-static dma_addr_t octeon_gen2_phys_to_dma(struct device *dev, phys_addr_t paddr)
-{
-	return octeon_hole_phys_to_dma(paddr);
-}
-
-static phys_addr_t octeon_gen2_dma_to_phys(struct device *dev, dma_addr_t daddr)
-{
-	return octeon_hole_dma_to_phys(daddr);
-}
-
 static dma_addr_t octeon_big_phys_to_dma(struct device *dev, phys_addr_t paddr)
 {
 	if (paddr >= 0x410000000ull && paddr < 0x420000000ull)
@@ -272,11 +262,11 @@ void __init plat_swiotlb_setup(void)
 
 	for (i = 0 ; i < boot_mem_map.nr_map; i++) {
 		struct boot_mem_map_entry *e = &boot_mem_map.map[i];
-		if (e->type != BOOT_MEM_RAM && e->type != BOOT_MEM_INIT_RAM)
+		if (e->type != BOOT_MEM_RAM)
 			continue;
 
 		/* These addresses map low for PCI. */
-		if (e->addr > 0x410000000ull && !OCTEON_IS_MODEL(OCTEON_CN6XXX))
+		if (e->addr > 0x410000000ull)
 			continue;
 
 		addr_size += e->size;
@@ -305,11 +295,6 @@ void __init plat_swiotlb_setup(void)
 		 */
 		swiotlbsize = 64 * (1<<20);
 	}
-#endif
-#ifdef CONFIG_USB_OCTEON_OHCI
-	/* OCTEON II ohci is only 32-bit. */
-	if (OCTEON_IS_MODEL(OCTEON_CN6XXX) && max_addr >= 0x100000000ul)
-		swiotlbsize = 64 * (1<<20);
 #endif
 	swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT;
 	swiotlb_nslabs = ALIGN(swiotlb_nslabs, IO_TLB_SEGSIZE);
@@ -345,10 +330,6 @@ struct dma_map_ops *octeon_pci_dma_map_ops;
 void __init octeon_pci_dma_init(void)
 {
 	switch (octeon_dma_bar_type) {
-	case OCTEON_DMA_BAR_TYPE_PCIE2:
-		_octeon_pci_dma_map_ops.phys_to_dma = octeon_gen2_phys_to_dma;
-		_octeon_pci_dma_map_ops.dma_to_phys = octeon_gen2_dma_to_phys;
-		break;
 	case OCTEON_DMA_BAR_TYPE_PCIE:
 		_octeon_pci_dma_map_ops.phys_to_dma = octeon_gen1_phys_to_dma;
 		_octeon_pci_dma_map_ops.dma_to_phys = octeon_gen1_dma_to_phys;

trunk/arch/mips/cavium-octeon/executive/Makefile

@@ -10,10 +10,5 @@
 #
 
 obj-y += cvmx-bootmem.o cvmx-l2c.o cvmx-sysinfo.o octeon-model.o
-obj-y += cvmx-pko.o cvmx-spi.o cvmx-cmd-queue.o \
-	cvmx-helper-board.o cvmx-helper.o cvmx-helper-xaui.o \
-	cvmx-helper-rgmii.o cvmx-helper-sgmii.o cvmx-helper-npi.o \
-	cvmx-helper-loop.o cvmx-helper-spi.o cvmx-helper-util.o \
-	cvmx-interrupt-decodes.o cvmx-interrupt-rsl.o
 
-obj-y += cvmx-helper-errata.o cvmx-helper-jtag.o
+obj-$(CONFIG_CAVIUM_OCTEON_HELPER) += cvmx-helper-errata.o cvmx-helper-jtag.o

trunk/arch/mips/cavium-octeon/executive/octeon-model.c

@@ -4,7 +4,7 @@
  * Contact: support@caviumnetworks.com
  * This file is part of the OCTEON SDK
  *
- * Copyright (c) 2003-2010 Cavium Networks
+ * Copyright (c) 2003-2008 Cavium Networks
  *
  * This file is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License, Version 2, as
@@ -25,6 +25,10 @@
  * Contact Cavium Networks for more information
  ***********************license end**************************************/
 
+/*
+ * File defining functions for working with different Octeon
+ * models.
+ */
 #include <asm/octeon/octeon.h>
 
 /**
@@ -65,12 +69,11 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
 	char fuse_model[10];
 	uint32_t fuse_data = 0;
 
-	fus3.u64 = 0;
-	if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
-		fus3.u64 = cvmx_read_csr(CVMX_L2D_FUS3);
+	fus3.u64 = cvmx_read_csr(CVMX_L2D_FUS3);
 	fus_dat2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
 	fus_dat3.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT3);
-	num_cores = cvmx_pop(cvmx_read_csr(CVMX_CIU_FUSE));
+
+	num_cores = cvmx_octeon_num_cores();
 
 	/* Make sure the non existent devices look disabled */
 	switch ((chip_id >> 8) & 0xff) {
@@ -105,20 +108,14 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
 	 * Assume pass number is encoded using <5:3><2:0>. Exceptions
 	 * will be fixed later.
 	 */
-	sprintf(pass, "%d.%d", (int)((chip_id >> 3) & 7) + 1, (int)chip_id & 7);
+	sprintf(pass, "%u.%u", ((chip_id >> 3) & 7) + 1, chip_id & 7);
 
 	/*
 	 * Use the number of cores to determine the last 2 digits of
 	 * the model number. There are some exceptions that are fixed
 	 * later.
 	 */
 	switch (num_cores) {
-	case 32:
-		core_model = "80";
-		break;
-	case 24:
-		core_model = "70";
-		break;
 	case 16:
 		core_model = "60";
 		break;
@@ -249,8 +246,8 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
 		break;
 	case 3:		/* CN58XX */
 		family = "58";
-		/* Special case. 4 core, half cache (CP with half cache) */
-		if ((num_cores == 4) && fus3.cn58xx.crip_1024k && !strncmp(suffix, "CP", 2))
+		/* Special case. 4 core, no crypto */
+		if ((num_cores == 4) && fus_dat2.cn38xx.nocrypto)
 			core_model = "29";
 
 		/* Pass 1 uses different encodings for pass numbers */
@@ -288,9 +285,6 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
 				suffix = "NSP";
 				if (fus_dat3.s.nozip)
 					suffix = "SCP";
-
-				if (fus_dat3.s.bar2_en)
-					suffix = "NSPB2";
 			}
 			if (fus3.cn56xx.crip_1024k)
 				family = "54";
@@ -307,60 +301,6 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
 		else
 			family = "52";
 		break;
-	case 0x93:		/* CN61XX */
-		family = "61";
-		if (fus_dat2.cn61xx.nocrypto && fus_dat2.cn61xx.dorm_crypto)
-			suffix = "AP";
-		if (fus_dat2.cn61xx.nocrypto)
-			suffix = "CP";
-		else if (fus_dat2.cn61xx.dorm_crypto)
-			suffix = "DAP";
-		else if (fus_dat3.cn61xx.nozip)
-			suffix = "SCP";
-		break;
-	case 0x90:		/* CN63XX */
-		family = "63";
-		if (fus_dat3.s.l2c_crip == 2)
-			family = "62";
-		if (num_cores == 6)	/* Other core counts match generic */
-			core_model = "35";
-		if (fus_dat2.cn63xx.nocrypto)
-			suffix = "CP";
-		else if (fus_dat2.cn63xx.dorm_crypto)
-			suffix = "DAP";
-		else if (fus_dat3.cn63xx.nozip)
-			suffix = "SCP";
-		else
-			suffix = "AAP";
-		break;
-	case 0x92:		/* CN66XX */
-		family = "66";
-		if (num_cores == 6)	/* Other core counts match generic */
-			core_model = "35";
-		if (fus_dat2.cn66xx.nocrypto && fus_dat2.cn66xx.dorm_crypto)
-			suffix = "AP";
-		if (fus_dat2.cn66xx.nocrypto)
-			suffix = "CP";
-		else if (fus_dat2.cn66xx.dorm_crypto)
-			suffix = "DAP";
-		else if (fus_dat3.cn66xx.nozip)
-			suffix = "SCP";
-		else
-			suffix = "AAP";
-		break;
-	case 0x91:		/* CN68XX */
-		family = "68";
-		if (fus_dat2.cn68xx.nocrypto && fus_dat3.cn68xx.nozip)
-			suffix = "CP";
-		else if (fus_dat2.cn68xx.dorm_crypto)
-			suffix = "DAP";
-		else if (fus_dat3.cn68xx.nozip)
-			suffix = "SCP";
-		else if (fus_dat2.cn68xx.nocrypto)
-			suffix = "SP";
-		else
-			suffix = "AAP";
-		break;
 	default:
 		family = "XX";
 		core_model = "XX";
@@ -370,40 +310,49 @@ const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer)
 	}
 
 	clock_mhz = octeon_get_clock_rate() / 1000000;
-	if (family[0] != '3') {
-		int fuse_base = 384 / 8;
-		if (family[0] == '6')
-			fuse_base = 832 / 8;
 
+	if (family[0] != '3') {
 		/* Check for model in fuses, overrides normal decode */
 		/* This is _not_ valid for Octeon CN3XXX models */
-		fuse_data |= cvmx_fuse_read_byte(fuse_base + 3);
+		fuse_data |= cvmx_fuse_read_byte(51);
 		fuse_data = fuse_data << 8;
-		fuse_data |= cvmx_fuse_read_byte(fuse_base + 2);
+		fuse_data |= cvmx_fuse_read_byte(50);
 		fuse_data = fuse_data << 8;
-		fuse_data |= cvmx_fuse_read_byte(fuse_base + 1);
+		fuse_data |= cvmx_fuse_read_byte(49);
 		fuse_data = fuse_data << 8;
-		fuse_data |= cvmx_fuse_read_byte(fuse_base);
+		fuse_data |= cvmx_fuse_read_byte(48);
 		if (fuse_data & 0x7ffff) {
 			int model = fuse_data & 0x3fff;
 			int suffix = (fuse_data >> 14) & 0x1f;
 			if (suffix && model) {
-				/* Have both number and suffix in fuses, so both */
-				sprintf(fuse_model, "%d%c", model, 'A' + suffix - 1);
+				/*
+				 * Have both number and suffix in
+				 * fuses, so both
+				 */
+				sprintf(fuse_model, "%d%c",
+					model, 'A' + suffix - 1);
 				core_model = "";
 				family = fuse_model;
 			} else if (suffix && !model) {
-				/* Only have suffix, so add suffix to 'normal' model number */
-				sprintf(fuse_model, "%s%c", core_model, 'A' + suffix - 1);
+				/*
+				 * Only have suffix, so add suffix to
+				 * 'normal' model number.
+				 */
+				sprintf(fuse_model, "%s%c", core_model,
+					'A' + suffix - 1);
 				core_model = fuse_model;
 			} else {
-				/* Don't have suffix, so just use model from fuses */
+				/*
+				 * Don't have suffix, so just use
+				 * model from fuses.
+				 */
 				sprintf(fuse_model, "%d", model);
 				core_model = "";
 				family = fuse_model;
 			}
 		}
 	}
-	sprintf(buffer, "CN%s%sp%s-%d-%s", family, core_model, pass, clock_mhz, suffix);
+	sprintf(buffer, "CN%s%sp%s-%d-%s",
+		family, core_model, pass, clock_mhz, suffix);
 	return buffer;
 }