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powerpc/85xx: Add P1010RDB board support
P1010RDB Overview ----------------- 1Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 32Mbyte SLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory I2C Board 128x8 bit memory SD/MMC connector to interface with the SD memory card 2 SATA interface 1 internal SATA connect to 2.5. 160G SATA2 HDD 1 eSATA connector to rear panel USB 2.0 x1 USB 2.0 port: connected via a UTMI PHY to Mini-AB interface. x1 USB 2.0 port: directly connected to Mini-AB interface Ethernet eTSEC1: Connected to RGMII PHY VSC8641XKO eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY VSC8221 eCAN Two DB-9 female connectors for Field bus interface UART DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Prabhakar Kushwaha
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Kumar Gala
committed
Jun 27, 2011
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/* | ||
* P1010 RDB Device Tree Source | ||
* | ||
* Copyright 2011 Freescale Semiconductor Inc. | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License as published by the | ||
* Free Software Foundation; either version 2 of the License, or (at your | ||
* option) any later version. | ||
*/ | ||
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/include/ "p1010si.dtsi" | ||
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/ { | ||
model = "fsl,P1010RDB"; | ||
compatible = "fsl,P1010RDB"; | ||
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aliases { | ||
serial0 = &serial0; | ||
serial1 = &serial1; | ||
ethernet0 = &enet0; | ||
ethernet1 = &enet1; | ||
ethernet2 = &enet2; | ||
pci0 = &pci0; | ||
pci1 = &pci1; | ||
}; | ||
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memory { | ||
device_type = "memory"; | ||
}; | ||
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ifc@ffe1e000 { | ||
/* NOR, NAND Flashes and CPLD on board */ | ||
ranges = <0x0 0x0 0x0 0xee000000 0x02000000 | ||
0x1 0x0 0x0 0xff800000 0x00010000 | ||
0x3 0x0 0x0 0xffb00000 0x00000020>; | ||
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nor@0,0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "cfi-flash"; | ||
reg = <0x0 0x0 0x2000000>; | ||
bank-width = <2>; | ||
device-width = <1>; | ||
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partition@40000 { | ||
/* 256KB for DTB Image */ | ||
reg = <0x00040000 0x00040000>; | ||
label = "NOR DTB Image"; | ||
}; | ||
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partition@80000 { | ||
/* 7 MB for Linux Kernel Image */ | ||
reg = <0x00080000 0x00700000>; | ||
label = "NOR Linux Kernel Image"; | ||
}; | ||
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partition@800000 { | ||
/* 20MB for JFFS2 based Root file System */ | ||
reg = <0x00800000 0x01400000>; | ||
label = "NOR JFFS2 Root File System"; | ||
}; | ||
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partition@1f00000 { | ||
/* This location must not be altered */ | ||
/* 512KB for u-boot Bootloader Image */ | ||
/* 512KB for u-boot Environment Variables */ | ||
reg = <0x01f00000 0x00100000>; | ||
label = "NOR U-Boot Image"; | ||
read-only; | ||
}; | ||
}; | ||
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nand@1,0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "fsl,ifc-nand"; | ||
reg = <0x1 0x0 0x10000>; | ||
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partition@0 { | ||
/* This location must not be altered */ | ||
/* 1MB for u-boot Bootloader Image */ | ||
reg = <0x0 0x00100000>; | ||
label = "NAND U-Boot Image"; | ||
read-only; | ||
}; | ||
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partition@100000 { | ||
/* 1MB for DTB Image */ | ||
reg = <0x00100000 0x00100000>; | ||
label = "NAND DTB Image"; | ||
}; | ||
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partition@200000 { | ||
/* 4MB for Linux Kernel Image */ | ||
reg = <0x00200000 0x00400000>; | ||
label = "NAND Linux Kernel Image"; | ||
}; | ||
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partition@600000 { | ||
/* 4MB for Compressed Root file System Image */ | ||
reg = <0x00600000 0x00400000>; | ||
label = "NAND Compressed RFS Image"; | ||
}; | ||
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partition@a00000 { | ||
/* 15MB for JFFS2 based Root file System */ | ||
reg = <0x00a00000 0x00f00000>; | ||
label = "NAND JFFS2 Root File System"; | ||
}; | ||
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partition@1900000 { | ||
/* 7MB for User Area */ | ||
reg = <0x01900000 0x00700000>; | ||
label = "NAND User area"; | ||
}; | ||
}; | ||
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cpld@3,0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "fsl,p1010rdb-cpld"; | ||
reg = <0x3 0x0 0x0000020>; | ||
bank-width = <1>; | ||
device-width = <1>; | ||
}; | ||
}; | ||
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soc@ffe00000 { | ||
spi@7000 { | ||
flash@0 { | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
compatible = "spansion,s25sl12801"; | ||
reg = <0>; | ||
spi-max-frequency = <50000000>; | ||
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partition@0 { | ||
/* 1MB for u-boot Bootloader Image */ | ||
/* 1MB for Environment */ | ||
reg = <0x0 0x00100000>; | ||
label = "SPI Flash U-Boot Image"; | ||
read-only; | ||
}; | ||
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partition@100000 { | ||
/* 512KB for DTB Image */ | ||
reg = <0x00100000 0x00080000>; | ||
label = "SPI Flash DTB Image"; | ||
}; | ||
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partition@180000 { | ||
/* 4MB for Linux Kernel Image */ | ||
reg = <0x00180000 0x00400000>; | ||
label = "SPI Flash Linux Kernel Image"; | ||
}; | ||
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partition@580000 { | ||
/* 4MB for Compressed RFS Image */ | ||
reg = <0x00580000 0x00400000>; | ||
label = "SPI Flash Compressed RFSImage"; | ||
}; | ||
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partition@980000 { | ||
/* 6.5MB for JFFS2 based RFS */ | ||
reg = <0x00980000 0x00680000>; | ||
label = "SPI Flash JFFS2 RFS"; | ||
}; | ||
}; | ||
}; | ||
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can0@1c000 { | ||
fsl,flexcan-clock-source = "platform"; | ||
}; | ||
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can1@1d000 { | ||
fsl,flexcan-clock-source = "platform"; | ||
}; | ||
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usb@22000 { | ||
phy_type = "utmi"; | ||
}; | ||
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mdio@24000 { | ||
phy0: ethernet-phy@0 { | ||
interrupt-parent = <&mpic>; | ||
interrupts = <3 1>; | ||
reg = <0x1>; | ||
}; | ||
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phy1: ethernet-phy@1 { | ||
interrupt-parent = <&mpic>; | ||
interrupts = <2 1>; | ||
reg = <0x0>; | ||
}; | ||
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phy2: ethernet-phy@2 { | ||
interrupt-parent = <&mpic>; | ||
interrupts = <2 1>; | ||
reg = <0x2>; | ||
}; | ||
}; | ||
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enet0: ethernet@b0000 { | ||
phy-handle = <&phy0>; | ||
phy-connection-type = "rgmii-id"; | ||
}; | ||
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enet1: ethernet@b1000 { | ||
phy-handle = <&phy1>; | ||
tbi-handle = <&tbi0>; | ||
phy-connection-type = "sgmii"; | ||
}; | ||
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enet2: ethernet@b2000 { | ||
phy-handle = <&phy2>; | ||
tbi-handle = <&tbi1>; | ||
phy-connection-type = "sgmii"; | ||
}; | ||
}; | ||
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pci0: pcie@ffe09000 { | ||
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 | ||
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; | ||
pcie@0 { | ||
reg = <0x0 0x0 0x0 0x0 0x0>; | ||
#interrupt-cells = <1>; | ||
#size-cells = <2>; | ||
#address-cells = <3>; | ||
device_type = "pci"; | ||
interrupt-parent = <&mpic>; | ||
interrupts = <16 2>; | ||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
interrupt-map = < | ||
/* IDSEL 0x0 */ | ||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
>; | ||
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ranges = <0x2000000 0x0 0xa0000000 | ||
0x2000000 0x0 0xa0000000 | ||
0x0 0x20000000 | ||
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0x1000000 0x0 0x0 | ||
0x1000000 0x0 0x0 | ||
0x0 0x100000>; | ||
}; | ||
}; | ||
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pci1: pcie@ffe0a000 { | ||
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 | ||
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; | ||
pcie@0 { | ||
reg = <0x0 0x0 0x0 0x0 0x0>; | ||
#interrupt-cells = <1>; | ||
#size-cells = <2>; | ||
#address-cells = <3>; | ||
device_type = "pci"; | ||
interrupt-parent = <&mpic>; | ||
interrupts = <16 2>; | ||
interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
interrupt-map = < | ||
/* IDSEL 0x0 */ | ||
0000 0x0 0x0 0x1 &mpic 0x4 0x1 | ||
0000 0x0 0x0 0x2 &mpic 0x5 0x1 | ||
0000 0x0 0x0 0x3 &mpic 0x6 0x1 | ||
0000 0x0 0x0 0x4 &mpic 0x7 0x1 | ||
>; | ||
ranges = <0x2000000 0x0 0x80000000 | ||
0x2000000 0x0 0x80000000 | ||
0x0 0x20000000 | ||
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0x1000000 0x0 0x0 | ||
0x1000000 0x0 0x0 | ||
0x0 0x100000>; | ||
}; | ||
}; | ||
}; |
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