---

yaml
---
r: 184655
b: refs/heads/master
c: 4680c29
h: refs/heads/master
i:
  184653: 7d21744
  184651: e63492c
  184647: 2183e6b
  184639: 15577a5
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 35e424e2c0229aa1e32776fac23902150bd0ab9a
+refs/heads/master: 4680c29f69e981106da2abfea7f1a3e6f1b03791

trunk/arch/arm/mach-omap2/clock2xxx.c

@@ -101,11 +101,14 @@ void omap2_clk_prepare_for_reboot(void)
  * Switch the MPU rate if specified on cmdline.
  * We cannot do this early until cmdline is parsed.
  */
-static int __init omap2_clk_arch_init(void)
+static int __init omap2xxx_clk_arch_init(void)
 {
 	struct clk *virt_prcm_set, *sys_ck, *dpll_ck, *mpu_ck;
 	unsigned long sys_ck_rate;
 
+	if (!cpu_is_omap24xx())
+		return 0;
+
 	if (!mpurate)
 		return -EINVAL;
 
@@ -129,6 +132,6 @@ static int __init omap2_clk_arch_init(void)
 
 	return 0;
 }
-arch_initcall(omap2_clk_arch_init);
+arch_initcall(omap2xxx_clk_arch_init);
 
 

trunk/arch/arm/mach-omap2/clock34xx.c

@@ -162,12 +162,6 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate)
 
 /* Common clock code */
 
-/*
- * As it is structured now, this will prevent an OMAP2/3 multiboot
- * kernel from compiling.  This will need further attention.
- */
-#if defined(CONFIG_ARCH_OMAP3)
-
 /*
  * Set clocks for bypass mode for reboot to work.
  */
@@ -213,11 +207,14 @@ void omap3_clk_lock_dpll5(void)
  * Switch the MPU rate if specified on cmdline.
  * We cannot do this early until cmdline is parsed.
  */
-static int __init omap2_clk_arch_init(void)
+static int __init omap3xxx_clk_arch_init(void)
 {
 	struct clk *osc_sys_ck, *dpll1_ck, *arm_fck, *core_ck;
 	unsigned long osc_sys_rate;
 
+	if (!cpu_is_omap34xx())
+		return 0;
+
 	if (!mpurate)
 		return -EINVAL;
 
@@ -246,9 +243,6 @@ static int __init omap2_clk_arch_init(void)
 
 	return 0;
 }
-arch_initcall(omap2_clk_arch_init);
-
-
-#endif
+arch_initcall(omap3xxx_clk_arch_init);