ARM: socfpga: dts: add osc1 as a possible parent for dbg_base_clk

The dbg_base_clk can also have osc1 has a parent. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
git-mirror · Jul 25, 2015 · 2e4c758 · 2e4c758
1 parent 7db85dd
commit 2e4c758
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
@@ -164,7 +164,7 @@
 						dbg_base_clk: dbg_base_clk {
 							#clock-cells = <0>;
 							compatible = "altr,socfpga-perip-clk";
-							clocks = <&main_pll>;
+							clocks = <&main_pll>, <&osc1>;
 							div-reg = <0xe8 0 9>;
 							reg = <0x50>;
 						};