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parisc: io: implement dummy relaxed accessor macros for writes
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write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.

This patch adds dummy macros for the write accessors to parisc, in the
same vein as the dummy definitions for the relaxed read accessors.

Cc: Helge Deller <deller@gmx.de>
Signed-off-by: Will Deacon <will.deacon@arm.com>
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Will Deacon committed Oct 20, 2014
1 parent 960a559 commit 2f08348
Showing 1 changed file with 8 additions and 4 deletions.
12 changes: 8 additions & 4 deletions arch/parisc/include/asm/io.h
Original file line number Diff line number Diff line change
Expand Up @@ -217,10 +217,14 @@ static inline void writeq(unsigned long long q, volatile void __iomem *addr)
#define writel writel
#define writeq writeq

#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define readq_relaxed(addr) readq(addr)
#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define readq_relaxed(addr) readq(addr)
#define writeb_relaxed(b, addr) writeb(b, addr)
#define writew_relaxed(w, addr) writew(w, addr)
#define writel_relaxed(l, addr) writel(l, addr)
#define writeq_relaxed(q, addr) writeq(q, addr)

#define mmiowb() do { } while (0)

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