[POWERPC] FSL: Access PCIe LTSSM register with correct size

The LTSSM register is actual 32-bits wide so we should be doing a dword access. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
git-mirror · Oct 8, 2007 · 2fce122 · 2fce122
1 parent 873553b
commit 2fce122
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
@@ -160,8 +160,8 @@ static void __init quirk_fsl_pcie_transparent(struct pci_dev *dev)
 
 int __init fsl_pcie_check_link(struct pci_controller *hose)
 {
-	u16 val;
-	early_read_config_word(hose, 0, 0, PCIE_LTSSM, &val);
+	u32 val;
+	early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val);
 	if (val < PCIE_LTSSM_L0)
 		return 1;
 	return 0;