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yaml
---
r: 242472
b: refs/heads/master
c: 0b888c7
h: refs/heads/master
v: v3
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Thomas Gleixner authored and Ralf Baechle committed Mar 25, 2011
1 parent 9f1c9f2 commit 31f15b9
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Showing 5 changed files with 34 additions and 75 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: d6d5d5c4afd4c8bb4c5e3753a2141e9c3a874629
refs/heads/master: 0b888c7f3a0396cfe59116575a35cdcd166fd515
23 changes: 6 additions & 17 deletions trunk/arch/mips/sni/a20r.c
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Expand Up @@ -168,33 +168,22 @@ static u32 a20r_ack_hwint(void)
return status;
}

static inline void unmask_a20r_irq(unsigned int irq)
static inline void unmask_a20r_irq(struct irq_data *d)
{
set_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
set_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
irq_enable_hazard();
}

static inline void mask_a20r_irq(unsigned int irq)
static inline void mask_a20r_irq(struct irq_data *d)
{
clear_c0_status(0x100 << (irq - SNI_A20R_IRQ_BASE));
clear_c0_status(0x100 << (d->irq - SNI_A20R_IRQ_BASE));
irq_disable_hazard();
}

static void end_a20r_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
a20r_ack_hwint();
unmask_a20r_irq(irq);
}
}

static struct irq_chip a20r_irq_type = {
.name = "A20R",
.ack = mask_a20r_irq,
.mask = mask_a20r_irq,
.mask_ack = mask_a20r_irq,
.unmask = unmask_a20r_irq,
.end = end_a20r_irq,
.irq_mask = mask_a20r_irq,
.irq_unmask = unmask_a20r_irq,
};

/*
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21 changes: 6 additions & 15 deletions trunk/arch/mips/sni/pcimt.c
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Expand Up @@ -194,33 +194,24 @@ static struct pci_controller sni_controller = {
.io_map_base = SNI_PORT_BASE
};

static void enable_pcimt_irq(unsigned int irq)
static void enable_pcimt_irq(struct irq_data *d)
{
unsigned int mask = 1 << (irq - PCIMT_IRQ_INT2);
unsigned int mask = 1 << (d->irq - PCIMT_IRQ_INT2);

*(volatile u8 *) PCIMT_IRQSEL |= mask;
}

void disable_pcimt_irq(unsigned int irq)
void disable_pcimt_irq(struct irq_data *d)
{
unsigned int mask = ~(1 << (irq - PCIMT_IRQ_INT2));
unsigned int mask = ~(1 << (d->irq - PCIMT_IRQ_INT2));

*(volatile u8 *) PCIMT_IRQSEL &= mask;
}

static void end_pcimt_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_pcimt_irq(irq);
}

static struct irq_chip pcimt_irq_type = {
.name = "PCIMT",
.ack = disable_pcimt_irq,
.mask = disable_pcimt_irq,
.mask_ack = disable_pcimt_irq,
.unmask = enable_pcimt_irq,
.end = end_pcimt_irq,
.irq_mask = disable_pcimt_irq,
.irq_unmask = enable_pcimt_irq,
};

/*
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21 changes: 6 additions & 15 deletions trunk/arch/mips/sni/pcit.c
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Original file line number Diff line number Diff line change
Expand Up @@ -156,33 +156,24 @@ static struct pci_controller sni_pcit_controller = {
.io_map_base = SNI_PORT_BASE
};

static void enable_pcit_irq(unsigned int irq)
static void enable_pcit_irq(struct irq_data *d)
{
u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);

*(volatile u32 *)SNI_PCIT_INT_REG |= mask;
}

void disable_pcit_irq(unsigned int irq)
void disable_pcit_irq(struct irq_data *d)
{
u32 mask = 1 << (irq - SNI_PCIT_INT_START + 24);
u32 mask = 1 << (d->irq - SNI_PCIT_INT_START + 24);

*(volatile u32 *)SNI_PCIT_INT_REG &= ~mask;
}

void end_pcit_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_pcit_irq(irq);
}

static struct irq_chip pcit_irq_type = {
.name = "PCIT",
.ack = disable_pcit_irq,
.mask = disable_pcit_irq,
.mask_ack = disable_pcit_irq,
.unmask = enable_pcit_irq,
.end = end_pcit_irq,
.irq_mask = disable_pcit_irq,
.irq_unmask = enable_pcit_irq,
};

static void pcit_hwint1(void)
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42 changes: 15 additions & 27 deletions trunk/arch/mips/sni/rm200.c
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Original file line number Diff line number Diff line change
Expand Up @@ -155,12 +155,11 @@ static __iomem u8 *rm200_pic_slave;
#define cached_master_mask (rm200_cached_irq_mask)
#define cached_slave_mask (rm200_cached_irq_mask >> 8)

static void sni_rm200_disable_8259A_irq(unsigned int irq)
static void sni_rm200_disable_8259A_irq(struct irq_data *d)
{
unsigned int mask;
unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
unsigned long flags;

irq -= RM200_I8259A_IRQ_BASE;
mask = 1 << irq;
raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
rm200_cached_irq_mask |= mask;
Expand All @@ -171,12 +170,11 @@ static void sni_rm200_disable_8259A_irq(unsigned int irq)
raw_spin_unlock_irqrestore(&sni_rm200_i8259A_lock, flags);
}

static void sni_rm200_enable_8259A_irq(unsigned int irq)
static void sni_rm200_enable_8259A_irq(struct irq_data *d)
{
unsigned int mask;
unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE;
unsigned long flags;

irq -= RM200_I8259A_IRQ_BASE;
mask = ~(1 << irq);
raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
rm200_cached_irq_mask &= mask;
Expand Down Expand Up @@ -210,12 +208,11 @@ static inline int sni_rm200_i8259A_irq_real(unsigned int irq)
* first, _then_ send the EOI, and the order of EOI
* to the two 8259s is important!
*/
void sni_rm200_mask_and_ack_8259A(unsigned int irq)
void sni_rm200_mask_and_ack_8259A(struct irq_data *d)
{
unsigned int irqmask;
unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE;
unsigned long flags;

irq -= RM200_I8259A_IRQ_BASE;
irqmask = 1 << irq;
raw_spin_lock_irqsave(&sni_rm200_i8259A_lock, flags);
/*
Expand Down Expand Up @@ -285,9 +282,9 @@ void sni_rm200_mask_and_ack_8259A(unsigned int irq)

static struct irq_chip sni_rm200_i8259A_chip = {
.name = "RM200-XT-PIC",
.mask = sni_rm200_disable_8259A_irq,
.unmask = sni_rm200_enable_8259A_irq,
.mask_ack = sni_rm200_mask_and_ack_8259A,
.irq_mask = sni_rm200_disable_8259A_irq,
.irq_unmask = sni_rm200_enable_8259A_irq,
.irq_mask_ack = sni_rm200_mask_and_ack_8259A,
};

/*
Expand Down Expand Up @@ -429,33 +426,24 @@ void __init sni_rm200_i8259_irqs(void)
#define SNI_RM200_INT_START 24
#define SNI_RM200_INT_END 28

static void enable_rm200_irq(unsigned int irq)
static void enable_rm200_irq(struct irq_data *d)
{
unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);

*(volatile u8 *)SNI_RM200_INT_ENA_REG &= ~mask;
}

void disable_rm200_irq(unsigned int irq)
void disable_rm200_irq(struct irq_data *d)
{
unsigned int mask = 1 << (irq - SNI_RM200_INT_START);
unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START);

*(volatile u8 *)SNI_RM200_INT_ENA_REG |= mask;
}

void end_rm200_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_rm200_irq(irq);
}

static struct irq_chip rm200_irq_type = {
.name = "RM200",
.ack = disable_rm200_irq,
.mask = disable_rm200_irq,
.mask_ack = disable_rm200_irq,
.unmask = enable_rm200_irq,
.end = end_rm200_irq,
.irq_mask = disable_rm200_irq,
.irq_unmask = enable_rm200_irq,
};

static void sni_rm200_hwint(void)
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