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ARM: imx: add common clock support for clk busy
Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Shawn Guo
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Sascha Hauer
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May 2, 2012
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/* | ||
* Copyright 2012 Freescale Semiconductor, Inc. | ||
* Copyright 2012 Linaro Ltd. | ||
* | ||
* The code contained herein is licensed under the GNU General Public | ||
* License. You may obtain a copy of the GNU General Public License | ||
* Version 2 or later at the following locations: | ||
* | ||
* http://www.opensource.org/licenses/gpl-license.html | ||
* http://www.gnu.org/copyleft/gpl.html | ||
*/ | ||
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#include <linux/clk.h> | ||
#include <linux/clk-provider.h> | ||
#include <linux/io.h> | ||
#include <linux/slab.h> | ||
#include <linux/jiffies.h> | ||
#include <linux/err.h> | ||
#include "clk.h" | ||
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static int clk_busy_wait(void __iomem *reg, u8 shift) | ||
{ | ||
unsigned long timeout = jiffies + msecs_to_jiffies(10); | ||
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while (readl_relaxed(reg) & (1 << shift)) | ||
if (time_after(jiffies, timeout)) | ||
return -ETIMEDOUT; | ||
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return 0; | ||
} | ||
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struct clk_busy_divider { | ||
struct clk_divider div; | ||
const struct clk_ops *div_ops; | ||
void __iomem *reg; | ||
u8 shift; | ||
}; | ||
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static inline struct clk_busy_divider *to_clk_busy_divider(struct clk_hw *hw) | ||
{ | ||
struct clk_divider *div = container_of(hw, struct clk_divider, hw); | ||
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return container_of(div, struct clk_busy_divider, div); | ||
} | ||
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static unsigned long clk_busy_divider_recalc_rate(struct clk_hw *hw, | ||
unsigned long parent_rate) | ||
{ | ||
struct clk_busy_divider *busy = to_clk_busy_divider(hw); | ||
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return busy->div_ops->recalc_rate(&busy->div.hw, parent_rate); | ||
} | ||
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static long clk_busy_divider_round_rate(struct clk_hw *hw, unsigned long rate, | ||
unsigned long *prate) | ||
{ | ||
struct clk_busy_divider *busy = to_clk_busy_divider(hw); | ||
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return busy->div_ops->round_rate(&busy->div.hw, rate, prate); | ||
} | ||
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static int clk_busy_divider_set_rate(struct clk_hw *hw, unsigned long rate, | ||
unsigned long parent_rate) | ||
{ | ||
struct clk_busy_divider *busy = to_clk_busy_divider(hw); | ||
int ret; | ||
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ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate); | ||
if (!ret) | ||
ret = clk_busy_wait(busy->reg, busy->shift); | ||
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return ret; | ||
} | ||
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static struct clk_ops clk_busy_divider_ops = { | ||
.recalc_rate = clk_busy_divider_recalc_rate, | ||
.round_rate = clk_busy_divider_round_rate, | ||
.set_rate = clk_busy_divider_set_rate, | ||
}; | ||
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struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, | ||
void __iomem *reg, u8 shift, u8 width, | ||
void __iomem *busy_reg, u8 busy_shift) | ||
{ | ||
struct clk_busy_divider *busy; | ||
struct clk *clk; | ||
struct clk_init_data init; | ||
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busy = kzalloc(sizeof(*busy), GFP_KERNEL); | ||
if (!busy) | ||
return ERR_PTR(-ENOMEM); | ||
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busy->reg = busy_reg; | ||
busy->shift = busy_shift; | ||
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busy->div.reg = reg; | ||
busy->div.shift = shift; | ||
busy->div.width = width; | ||
busy->div.lock = &imx_ccm_lock; | ||
busy->div_ops = &clk_divider_ops; | ||
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init.name = name; | ||
init.ops = &clk_busy_divider_ops; | ||
init.flags = CLK_SET_RATE_PARENT; | ||
init.parent_names = &parent_name; | ||
init.num_parents = 1; | ||
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busy->div.hw.init = &init; | ||
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clk = clk_register(NULL, &busy->div.hw); | ||
if (!clk) | ||
kfree(busy); | ||
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return clk; | ||
} | ||
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struct clk_busy_mux { | ||
struct clk_mux mux; | ||
const struct clk_ops *mux_ops; | ||
void __iomem *reg; | ||
u8 shift; | ||
}; | ||
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static inline struct clk_busy_mux *to_clk_busy_mux(struct clk_hw *hw) | ||
{ | ||
struct clk_mux *mux = container_of(hw, struct clk_mux, hw); | ||
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return container_of(mux, struct clk_busy_mux, mux); | ||
} | ||
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static u8 clk_busy_mux_get_parent(struct clk_hw *hw) | ||
{ | ||
struct clk_busy_mux *busy = to_clk_busy_mux(hw); | ||
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return busy->mux_ops->get_parent(&busy->mux.hw); | ||
} | ||
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static int clk_busy_mux_set_parent(struct clk_hw *hw, u8 index) | ||
{ | ||
struct clk_busy_mux *busy = to_clk_busy_mux(hw); | ||
int ret; | ||
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ret = busy->mux_ops->set_parent(&busy->mux.hw, index); | ||
if (!ret) | ||
ret = clk_busy_wait(busy->reg, busy->shift); | ||
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return ret; | ||
} | ||
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struct clk_ops clk_busy_mux_ops = { | ||
.get_parent = clk_busy_mux_get_parent, | ||
.set_parent = clk_busy_mux_set_parent, | ||
}; | ||
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struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, | ||
u8 width, void __iomem *busy_reg, u8 busy_shift, | ||
const char **parent_names, int num_parents) | ||
{ | ||
struct clk_busy_mux *busy; | ||
struct clk *clk; | ||
struct clk_init_data init; | ||
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busy = kzalloc(sizeof(*busy), GFP_KERNEL); | ||
if (!busy) | ||
return ERR_PTR(-ENOMEM); | ||
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busy->reg = busy_reg; | ||
busy->shift = busy_shift; | ||
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busy->mux.reg = reg; | ||
busy->mux.shift = shift; | ||
busy->mux.width = width; | ||
busy->mux.lock = &imx_ccm_lock; | ||
busy->mux_ops = &clk_mux_ops; | ||
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init.name = name; | ||
init.ops = &clk_busy_mux_ops; | ||
init.flags = 0; | ||
init.parent_names = parent_names; | ||
init.num_parents = num_parents; | ||
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busy->mux.hw.init = &init; | ||
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clk = clk_register(NULL, &busy->mux.hw); | ||
if (IS_ERR(clk)) | ||
kfree(busy); | ||
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return clk; | ||
} |
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