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Debug (printascii) and IRQ handler macros for the LPC32XX arch Signed-off-by: Kevin Wells <wellsk40@gmail.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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| /* | ||
| * arch/arm/mach-lpc32xx/include/mach/debug-macro.S | ||
| * | ||
| * Author: Kevin Wells <kevin.wells@nxp.com> | ||
| * | ||
| * Copyright (C) 2010 NXP Semiconductors | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License as published by | ||
| * the Free Software Foundation; either version 2 of the License, or | ||
| * (at your option) any later version. | ||
| * | ||
| * This program is distributed in the hope that it will be useful, | ||
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| * GNU General Public License for more details. | ||
| */ | ||
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| /* | ||
| * Debug output is hardcoded to standard UART 5 | ||
| */ | ||
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| .macro addruart,rx, tmp | ||
| mrc p15, 0, \rx, c1, c0 | ||
| tst \rx, #1 @ MMU enabled? | ||
| ldreq \rx, =0x40090000 | ||
| ldrne \rx, =0xF4090000 | ||
| .endm | ||
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| #define UART_SHIFT 2 | ||
| #include <asm/hardware/debug-8250.S> |
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| /* | ||
| * arch/arm/mach-lpc32xx/include/mach/entry-macro.S | ||
| * | ||
| * Author: Kevin Wells <kevin.wells@nxp.com> | ||
| * | ||
| * Copyright (C) 2010 NXP Semiconductors | ||
| * | ||
| * This program is free software; you can redistribute it and/or modify | ||
| * it under the terms of the GNU General Public License as published by | ||
| * the Free Software Foundation; either version 2 of the License, or | ||
| * (at your option) any later version. | ||
| * | ||
| * This program is distributed in the hope that it will be useful, | ||
| * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
| * GNU General Public License for more details. | ||
| */ | ||
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| #include <mach/hardware.h> | ||
| #include <mach/platform.h> | ||
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| #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 | ||
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| .macro disable_fiq | ||
| .endm | ||
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| .macro get_irqnr_preamble, base, tmp | ||
| ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) | ||
| .endm | ||
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| .macro arch_ret_to_user, tmp1, tmp2 | ||
| .endm | ||
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| /* | ||
| * Return IRQ number in irqnr. Also return processor Z flag status in CPSR | ||
| * as set if an interrupt is pending. | ||
| */ | ||
| .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
| ldr \irqstat, [\base, #LPC32XX_INTC_MASKED_STATUS_OFS] | ||
| clz \irqnr, \irqstat | ||
| rsb \irqnr, \irqnr, #31 | ||
| teq \irqstat, #0 | ||
| .endm | ||
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| .macro irq_prio_table | ||
| .endm | ||
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