ARM: dts: vexpress: disable CA9 core tile sp804 timer

The motherboard sp804 timer is used, but core tile sp804 timer is not. According to Russell King, the clock configuration is undocumented and defaults to 32kHz which is not desireable. So mark core tile sp804 timer as disabled. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
git-mirror · Apr 11, 2013 · 34c2e5f · 34c2e5f
1 parent dabfd8f
commit 34c2e5f
Showing 1 changed file with 1 addition and 0 deletions.
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts
@@ -98,6 +98,7 @@
 			     <0 49 4>;
 		clocks = <&oscclk2>, <&oscclk2>;
 		clock-names = "timclk", "apb_pclk";
+		status = "disabled";
 	};
 
 	watchdog@100e5000 {