[PATCH] chelsio: add 1G swcixw aupport

Add support for 1G versions of Chelsio devices. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
git-mirror · Dec 2, 2006 · 352c417 · 352c417
1 parent f1d3d38
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diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
@@ -2376,6 +2376,13 @@ config CHELSIO_T1
           To compile this driver as a module, choose M here: the module
           will be called cxgb.
 
+config CHELSIO_T1_1G
+        bool "Chelsio gigabit Ethernet support"
+        depends on CHELSIO_T1
+        help
+          Enables support for Chelsio's gigabit Ethernet PCI cards.  If you
+          are using only 10G cards say 'N' here.
+
 config EHEA
 	tristate "eHEA Ethernet support"
 	depends on IBMEBUS

diff --git a/drivers/net/chelsio/Makefile b/drivers/net/chelsio/Makefile
@@ -4,6 +4,7 @@
 
 obj-$(CONFIG_CHELSIO_T1) += cxgb.o
 
+cxgb-$(CONFIG_CHELSIO_T1_1G) += ixf1010.o mac.o mv88e1xxx.o vsc7326.o vsc8244.o
 cxgb-objs := cxgb2.o espi.o tp.o pm3393.o sge.o subr.o \
 	     mv88x201x.o my3126.o $(cxgb-y)
 

diff --git a/drivers/net/chelsio/common.h b/drivers/net/chelsio/common.h
@@ -283,6 +283,8 @@ struct adapter {
 
 	spinlock_t tpi_lock;
 	spinlock_t work_lock;
+	spinlock_t mac_lock;
+
 	/* guards async operations */
 	spinlock_t async_lock ____cacheline_aligned;
 	u32 slow_intr_mask;

diff --git a/drivers/net/chelsio/cxgb2.c b/drivers/net/chelsio/cxgb2.c
@@ -1094,6 +1094,7 @@ static int __devinit init_one(struct pci_dev *pdev,
 			spin_lock_init(&adapter->tpi_lock);
 			spin_lock_init(&adapter->work_lock);
 			spin_lock_init(&adapter->async_lock);
+			spin_lock_init(&adapter->mac_lock);
 
 			INIT_WORK(&adapter->ext_intr_handler_task,
 				  ext_intr_task, adapter);