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yaml
---
r: 71000
b: refs/heads/master
c: d1e0847
h: refs/heads/master
v: v3
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Jan Beulich authored and Thomas Gleixner committed Oct 17, 2007
1 parent 7f7d258 commit 35675b4
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Showing 2 changed files with 9 additions and 7 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 909dd324fb57ad690c38c4e3d52337defa099ce8
refs/heads/master: d1e084746b0e5806e6345ab31c5b370f8dee2b23
14 changes: 8 additions & 6 deletions trunk/arch/x86/kernel/cpu/perfctr-watchdog.c
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ struct wd_ops {
u64 checkbit;
};

static struct wd_ops *wd_ops;
static const struct wd_ops *wd_ops;

/* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
* offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now)
Expand Down Expand Up @@ -317,7 +317,7 @@ static void single_msr_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
write_watchdog_counter(wd->perfctr_msr, NULL, nmi_hz);
}

static struct wd_ops k7_wd_ops = {
static const struct wd_ops k7_wd_ops = {
.reserve = single_msr_reserve,
.unreserve = single_msr_unreserve,
.setup = setup_k7_watchdog,
Expand Down Expand Up @@ -380,7 +380,7 @@ static void p6_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
write_watchdog_counter32(wd->perfctr_msr, NULL,nmi_hz);
}

static struct wd_ops p6_wd_ops = {
static const struct wd_ops p6_wd_ops = {
.reserve = single_msr_reserve,
.unreserve = single_msr_unreserve,
.setup = setup_p6_watchdog,
Expand Down Expand Up @@ -532,7 +532,7 @@ static void p4_rearm(struct nmi_watchdog_ctlblk *wd, unsigned nmi_hz)
write_watchdog_counter(wd->perfctr_msr, NULL, nmi_hz);
}

static struct wd_ops p4_wd_ops = {
static const struct wd_ops p4_wd_ops = {
.reserve = p4_reserve,
.unreserve = p4_unreserve,
.setup = setup_p4_watchdog,
Expand All @@ -550,6 +550,8 @@ static struct wd_ops p4_wd_ops = {
#define ARCH_PERFMON_NMI_EVENT_SEL ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL
#define ARCH_PERFMON_NMI_EVENT_UMASK ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK

static struct wd_ops intel_arch_wd_ops;

static int setup_intel_arch_watchdog(unsigned nmi_hz)
{
unsigned int ebx;
Expand Down Expand Up @@ -591,11 +593,11 @@ static int setup_intel_arch_watchdog(unsigned nmi_hz)
wd->perfctr_msr = perfctr_msr;
wd->evntsel_msr = evntsel_msr;
wd->cccr_msr = 0; //unused
wd_ops->checkbit = 1ULL << (eax.split.bit_width - 1);
intel_arch_wd_ops.checkbit = 1ULL << (eax.split.bit_width - 1);
return 1;
}

static struct wd_ops intel_arch_wd_ops = {
static struct wd_ops intel_arch_wd_ops __read_mostly = {
.reserve = single_msr_reserve,
.unreserve = single_msr_unreserve,
.setup = setup_intel_arch_watchdog,
Expand Down

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