---

yaml
---
r: 123614
b: refs/heads/master
c: ae696fd
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 773e9610a7bd44720b8b625d01997b2953edc2db
+refs/heads/master: ae696fd53280d85b43ec1dd74f80162bee088862

trunk/arch/arm/Kconfig

@@ -201,7 +201,6 @@ choice
 
 config ARCH_AAEC2000
 	bool "Agilent AAEC-2000 based"
-	select CPU_ARM920T
 	select ARM_AMBA
 	select HAVE_CLK
 	help
@@ -247,15 +246,22 @@ config ARCH_AT91
 	  This enables support for systems based on the Atmel AT91RM9200,
 	  AT91SAM9 and AT91CAP9 processors.
 
+config ARCH_CLPS7500
+	bool "Cirrus CL-PS7500FE"
+	select TIMER_ACORN
+	select ISA
+	select NO_IOPORT
+	select ARCH_SPARSEMEM_ENABLE
+	help
+	  Support for the Cirrus Logic PS7500FE system-on-a-chip.
+
 config ARCH_CLPS711X
 	bool "Cirrus Logic CLPS711x/EP721x-based"
-	select CPU_ARM720T
 	help
 	  Support for Cirrus Logic 711x/721x based boards.
 
 config ARCH_EBSA110
 	bool "EBSA-110"
-	select CPU_SA110
 	select ISA
 	select NO_IOPORT
 	help
@@ -266,40 +272,36 @@ config ARCH_EBSA110
 
 config ARCH_EP93XX
 	bool "EP93xx-based"
-	select CPU_ARM920T
 	select ARM_AMBA
 	select ARM_VIC
 	select GENERIC_GPIO
 	select HAVE_CLK
+	select COMMON_CLKDEV
 	select ARCH_REQUIRE_GPIOLIB
 	help
 	  This enables support for the Cirrus EP93xx series of CPUs.
 
 config ARCH_FOOTBRIDGE
 	bool "FootBridge"
-	select CPU_SA110
 	select FOOTBRIDGE
 	help
 	  Support for systems based on the DC21285 companion chip
 	  ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
 
 config ARCH_NETX
 	bool "Hilscher NetX based"
-	select CPU_ARM926T
 	select ARM_VIC
 	help
 	  This enables support for systems based on the Hilscher NetX Soc
 
 config ARCH_H720X
 	bool "Hynix HMS720x-based"
-	select CPU_ARM720T
 	select ISA_DMA_API
 	help
 	  This enables support for systems based on the Hynix HMS720x
 
 config ARCH_IMX
 	bool "IMX"
-	select CPU_ARM920T
 	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -309,7 +311,6 @@ config ARCH_IMX
 config ARCH_IOP13XX
 	bool "IOP13xx-based"
 	depends on MMU
-	select CPU_XSC3
 	select PLAT_IOP
 	select PCI
 	select ARCH_SUPPORTS_MSI
@@ -320,7 +321,6 @@ config ARCH_IOP13XX
 config ARCH_IOP32X
 	bool "IOP32x-based"
 	depends on MMU
-	select CPU_XSCALE
 	select PLAT_IOP
 	select PCI
 	select GENERIC_GPIO
@@ -332,7 +332,6 @@ config ARCH_IOP32X
 config ARCH_IOP33X
 	bool "IOP33x-based"
 	depends on MMU
-	select CPU_XSCALE
 	select PLAT_IOP
 	select PCI
 	select GENERIC_GPIO
@@ -343,23 +342,20 @@ config ARCH_IOP33X
 config ARCH_IXP23XX
  	bool "IXP23XX-based"
 	depends on MMU
-	select CPU_XSC3
  	select PCI
 	help
 	  Support for Intel's IXP23xx (XScale) family of processors.
 
 config ARCH_IXP2000
 	bool "IXP2400/2800-based"
 	depends on MMU
-	select CPU_XSCALE
 	select PCI
 	help
 	  Support for Intel's IXP2400/2800 (XScale) family of processors.
 
 config ARCH_IXP4XX
 	bool "IXP4xx-based"
 	depends on MMU
-	select CPU_XSCALE
 	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -369,7 +365,6 @@ config ARCH_IXP4XX
 
 config ARCH_L7200
 	bool "LinkUp-L7200"
-	select CPU_ARM720T
 	select FIQ
 	help
 	  Say Y here if you intend to run this kernel on a LinkUp Systems
@@ -383,7 +378,6 @@ config ARCH_L7200
 
 config ARCH_KIRKWOOD
 	bool "Marvell Kirkwood"
-	select CPU_FEROCEON
 	select PCI
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -394,15 +388,13 @@ config ARCH_KIRKWOOD
 
 config ARCH_KS8695
 	bool "Micrel/Kendin KS8695"
-	select CPU_ARM922T
 	select GENERIC_GPIO
 	help
 	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 	  System-on-Chip devices.
 
 config ARCH_NS9XXX
 	bool "NetSilicon NS9xxx"
-	select CPU_ARM926T
 	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -415,7 +407,6 @@ config ARCH_NS9XXX
 
 config ARCH_LOKI
 	bool "Marvell Loki (88RC8480)"
-	select CPU_FEROCEON
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	select PLAT_ORION
@@ -424,7 +415,6 @@ config ARCH_LOKI
 
 config ARCH_MV78XX0
 	bool "Marvell MV78xx0"
-	select CPU_FEROCEON
 	select PCI
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -446,7 +436,6 @@ config ARCH_MXC
 config ARCH_ORION5X
 	bool "Marvell Orion"
 	depends on MMU
-	select CPU_FEROCEON
 	select PCI
 	select GENERIC_GPIO
 	select GENERIC_TIME
@@ -459,7 +448,6 @@ config ARCH_ORION5X
 
 config ARCH_PNX4008
 	bool "Philips Nexperia PNX4008 Mobile"
-	select CPU_ARM926T
 	select HAVE_CLK
 	help
 	  This enables support for Philips PNX4008 mobile platform.
@@ -494,7 +482,6 @@ config ARCH_RPC
 
 config ARCH_SA1100
 	bool "SA1100-based"
-	select CPU_SA1100
 	select ISA
 	select ARCH_SPARSEMEM_ENABLE
 	select ARCH_MTD_XIP
@@ -518,7 +505,6 @@ config ARCH_S3C2410
 
 config ARCH_SHARK
 	bool "Shark"
-	select CPU_SA110
 	select ISA
 	select ISA_DMA
 	select ZONE_DMA
@@ -529,7 +515,6 @@ config ARCH_SHARK
 
 config ARCH_LH7A40X
 	bool "Sharp LH7A40X"
-	select CPU_ARM922T
 	select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
 	select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
 	help
@@ -540,7 +525,6 @@ config ARCH_LH7A40X
 
 config ARCH_DAVINCI
 	bool "TI DaVinci"
-	select CPU_ARM926T
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_GPIO
@@ -562,7 +546,6 @@ config ARCH_OMAP
 
 config ARCH_MSM
 	bool "Qualcomm MSM"
-	select CPU_V6
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	help

trunk/arch/arm/Makefile

@@ -96,6 +96,7 @@ textofs-y	:= 0x00008000
 
  machine-$(CONFIG_ARCH_RPC)	   := rpc
  machine-$(CONFIG_ARCH_EBSA110)	   := ebsa110
+ machine-$(CONFIG_ARCH_CLPS7500)   := clps7500
  machine-$(CONFIG_FOOTBRIDGE)	   := footbridge
  machine-$(CONFIG_ARCH_SHARK)	   := shark
  machine-$(CONFIG_ARCH_SA1100)	   := sa1100

trunk/arch/arm/boot/compressed/Makefile

@@ -23,6 +23,10 @@ ifeq ($(CONFIG_ARCH_L7200),y)
 OBJS		+= head-l7200.o
 endif
 
+ifeq ($(CONFIG_ARCH_CLPS7500),y)
+HEAD		= head-clps7500.o
+endif
+
 ifeq ($(CONFIG_ARCH_P720T),y)
 # Borrow this code from SA1100
 OBJS		+= head-sa1100.o

trunk/arch/arm/boot/compressed/head-clps7500.S

@@ -0,0 +1,86 @@
+/*
+ * linux/arch/arm/boot/compressed/head-clps7500.S
+ *
+ * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
+ */
+
+
+		/* There are three different ways the kernel can be
+		   booted on a 7500 system: from Angel (loaded in RAM), from
+		   16-bit ROM or from 32-bit Flash.  Luckily, a single kernel
+		   image does for them all. */
+		/* This branch is taken if the CPU memory width matches the
+		   actual device in use.  The default at power on is 16 bits
+		   so we must be prepared for a mismatch. */
+		.section ".start", "ax"
+2:
+		b	1f
+		.word	0xffff
+		.word	0xb632		@ mov r11, #0x03200000
+		.word	0xe3a0
+		.word	0x0000		@ mov r0, #0
+		.word	0xe3a0
+		.word	0x0080		@ strb r0, [r11, #0x80]
+		.word	0xe5cb
+		.word	0xf000		@ mov pc, #0
+		.word	0xe3a0
+1:
+		adr	r1, 2b
+		teq	r1, #0
+		bne	.Langel
+		/* This is a direct-from-ROM boot.  Copy the kernel into 
+		   RAM and run it there. */
+		mov	r0, #0x30
+		mcr	p15, 0, r0, c1, c0, 0
+		mov	r0, #0x13
+		msr	cpsr_cxsf, r0
+		mov	r12, #0x03000000	@ point to LEDs
+		orr	r12, r12, #0x00020000
+		orr	r12, r12, #0xba00
+		mov	r0, #0x5500
+		str	r0, [r12]
+		mov	r0, #0x10000000
+		orr	r0, r0, #0x8000
+		mov	r4, r0
+		ldr	r2, =_end
+2:
+		ldr	r3, [r1], #4
+		str	r3, [r0], #4
+		teq	r0, r2
+		bne	2b
+		mov	r0, #0xff00
+		str	r0, [r12]
+1:	
+		mov	r12, #0x03000000	@ point to LEDs
+		orr	r12, r12, #0x00020000
+		orr	r12, r12, #0xba00
+		mov	r0, #0xfe00
+		str	r0, [r12]
+
+		adr	lr, 1f
+		mov	r0, #0
+		mov	r1, #14		/* MACH_TYPE_CLPS7500 */
+		mov	pc, lr
+.Langel:
+#ifdef CONFIG_ANGELBOOT
+		/* Call Angel to switch into SVC mode. */
+		mov	r0, #0x17
+		swi	0x123456
+#endif
+		/* Ensure all interrupts are off and MMU disabled */
+		mrs	r0, cpsr
+		orr	r0, r0, #0xc0
+		msr	cpsr_cxsf, r0
+
+		adr	lr, 1b
+		orr	lr, lr, #0x10000000
+		mov	r0, #0x30		@ MMU off
+		mcr	p15, 0, r0, c1, c0, 0
+		mov	r0, r0
+	 	mov	pc, lr
+
+		.ltorg
+
+1:
+/* And the rest */
+#include "head.S"

trunk/arch/arm/boot/compressed/head.S

@@ -717,9 +717,6 @@ __armv7_mmu_cache_off:
 		bl	__armv7_mmu_cache_flush
 		mov	r0, #0
 		mcr	p15, 0, r0, c8, c7, 0	@ invalidate whole TLB
-		mcr	p15, 0, r0, c7, c5, 6	@ invalidate BTC
-		mcr	p15, 0, r0, c7, c10, 4	@ DSB
-		mcr	p15, 0, r0, c7, c5, 4	@ ISB
 		mov	pc, r12
 
 __arm6_mmu_cache_off:
@@ -781,13 +778,12 @@ __armv6_mmu_cache_flush:
 __armv7_mmu_cache_flush:
 		mrc	p15, 0, r10, c0, c1, 5	@ read ID_MMFR1
 		tst	r10, #0xf << 16		@ hierarchical cache (ARMv7)
-		mov	r10, #0
 		beq	hierarchical
+		mov	r10, #0
 		mcr	p15, 0, r10, c7, c14, 0	@ clean+invalidate D
 		b	iflush
 hierarchical:
-		mcr	p15, 0, r10, c7, c10, 5	@ DMB
-		stmfd	sp!, {r0-r5, r7, r9, r11}
+		stmfd	sp!, {r0-r5, r7, r9-r11}
 		mrc	p15, 1, r0, c0, c0, 1	@ read clidr
 		ands	r3, r0, #0x7000000	@ extract loc from clidr
 		mov	r3, r3, lsr #23		@ left align loc bit field
@@ -824,14 +820,12 @@ skip:
 		cmp	r3, r10
 		bgt	loop1
 finished:
-		ldmfd	sp!, {r0-r5, r7, r9, r11}
 		mov	r10, #0			@ swith back to cache level 0
 		mcr	p15, 2, r10, c0, c0, 0	@ select current cache level in cssr
+		ldmfd	sp!, {r0-r5, r7, r9-r11}
 iflush:
-		mcr	p15, 0, r10, c7, c10, 4	@ DSB
 		mcr	p15, 0, r10, c7, c5, 0	@ invalidate I+BTB
-		mcr	p15, 0, r10, c7, c10, 4	@ DSB
-		mcr	p15, 0, r10, c7, c5, 4	@ ISB
+		mcr	p15, 0, r10, c7, c10, 4	@ drain WB
 		mov	pc, lr
 
 __armv5tej_mmu_cache_flush:

trunk/arch/arm/boot/compressed/misc.c

@@ -86,8 +86,6 @@ static void putstr(const char *ptr)
 
 #define __ptr_t void *
 
-#define memzero(s,n) __memzero(s,n)
-
 /*
  * Optimised C version of memzero for the ARM.
  */