---

yaml
---
r: 81219
b: refs/heads/master
c: f365355
h: refs/heads/master
i:
  81217: 0eb8b40
  81215: c731f7c
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 533b1928b5c37dbdaabec3e7ff073aee8d7af3eb
+refs/heads/master: f365355e65ee619e3b7baeca69b46fd2c4a5ec68

trunk/arch/powerpc/Kconfig

@@ -166,7 +166,6 @@ config PPC_OF_PLATFORM_PCI
 
 source "init/Kconfig"
 
-source "arch/powerpc/sysdev/Kconfig"
 source "arch/powerpc/platforms/Kconfig"
 
 menu "Kernel options"

trunk/arch/powerpc/Kconfig.debug

@@ -225,16 +225,7 @@ config PPC_EARLY_DEBUG_44x
 	depends on 44x
 	help
 	  Select this to enable early debugging for IBM 44x chips via the
-	  inbuilt serial port.  If you enable this, ensure you set
-          PPC_EARLY_DEBUG_44x_PHYSLOW below to suit your target board.
-
-config PPC_EARLY_DEBUG_40x
-	bool "Early serial debugging for IBM/AMCC 40x CPUs"
-	depends on 40x
-	help
-	  Select this to enable early debugging for IBM 40x chips via the
-	  inbuilt serial port. This works on chips with a 16550 compatible
-	  UART. Xilinx chips with uartlite cannot use this option.
+	  inbuilt serial port.
 
 config PPC_EARLY_DEBUG_CPM
 	bool "Early serial debugging for Freescale CPM-based serial ports"
@@ -251,20 +242,12 @@ config PPC_EARLY_DEBUG_44x_PHYSLOW
 	hex "Low 32 bits of early debug UART physical address"
 	depends on PPC_EARLY_DEBUG_44x
 	default "0x40000200"
-	help
-	  You probably want 0x40000200 for ebony boards and
-          0x40000300 for taishan
 
 config PPC_EARLY_DEBUG_44x_PHYSHIGH
 	hex "EPRN of early debug UART physical address"
 	depends on PPC_EARLY_DEBUG_44x
 	default "0x1"
 
-config PPC_EARLY_DEBUG_40x_PHYSADDR
-	hex "Early debug UART physical address"
-	depends on PPC_EARLY_DEBUG_40x
-	default "0xef600300"
-
 config PPC_EARLY_DEBUG_CPM_ADDR
 	hex "CPM UART early debug transmit descriptor address"
 	depends on PPC_EARLY_DEBUG_CPM