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DSA: Convert DSA comments to network-style comments
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Convert DSA driver comments to network-style comments as reported by
checkpatch.pl.  Fix spelling error.

Signed-off-by: Barry Grussling <barry@grussling.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Barry Grussling authored and David S. Miller committed Jan 10, 2013
1 parent a0376db commit 3675c8d
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Showing 5 changed files with 93 additions and 232 deletions.
31 changes: 9 additions & 22 deletions drivers/net/dsa/mv88e6060.c
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Original file line number Diff line number Diff line change
Expand Up @@ -67,27 +67,19 @@ static int mv88e6060_switch_reset(struct dsa_switch *ds)
int i;
int ret;

/*
* Set all ports to the disabled state.
*/
/* Set all ports to the disabled state. */
for (i = 0; i < 6; i++) {
ret = REG_READ(REG_PORT(i), 0x04);
REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
}

/*
* Wait for transmit queues to drain.
*/
/* Wait for transmit queues to drain. */
msleep(2);

/*
* Reset the switch.
*/
/* Reset the switch. */
REG_WRITE(REG_GLOBAL, 0x0a, 0xa130);

/*
* Wait up to one second for reset to complete.
*/
/* Wait up to one second for reset to complete. */
for (i = 0; i < 1000; i++) {
ret = REG_READ(REG_GLOBAL, 0x00);
if ((ret & 0x8000) == 0x0000)
Expand All @@ -103,15 +95,13 @@ static int mv88e6060_switch_reset(struct dsa_switch *ds)

static int mv88e6060_setup_global(struct dsa_switch *ds)
{
/*
* Disable discarding of frames with excessive collisions,
/* Disable discarding of frames with excessive collisions,
* set the maximum frame size to 1536 bytes, and mask all
* interrupt sources.
*/
REG_WRITE(REG_GLOBAL, 0x04, 0x0800);

/*
* Enable automatic address learning, set the address
/* Enable automatic address learning, set the address
* database size to 1024 entries, and set the default aging
* time to 5 minutes.
*/
Expand All @@ -124,16 +114,14 @@ static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
{
int addr = REG_PORT(p);

/*
* Do not force flow control, disable Ingress and Egress
/* Do not force flow control, disable Ingress and Egress
* Header tagging, disable VLAN tunneling, and set the port
* state to Forwarding. Additionally, if this is the CPU
* port, enable Ingress and Egress Trailer tagging mode.
*/
REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003);

/*
* Port based VLAN map: give each port its own address
/* Port based VLAN map: give each port its own address
* database, allow the CPU port to talk to each of the 'real'
* ports, and allow each of the 'real' ports to only talk to
* the CPU port.
Expand All @@ -144,8 +132,7 @@ static int mv88e6060_setup_port(struct dsa_switch *ds, int p)
ds->phys_port_mask :
(1 << ds->dst->cpu_port)));

/*
* Port Association Vector: when learning source addresses
/* Port Association Vector: when learning source addresses
* of packets, add the address to the address database using
* a port bitmap that has only the bit for this port set and
* the other bits clear.
Expand Down
113 changes: 33 additions & 80 deletions drivers/net/dsa/mv88e6123_61_65.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -51,27 +51,19 @@ static int mv88e6123_61_65_switch_reset(struct dsa_switch *ds)
int i;
int ret;

/*
* Set all ports to the disabled state.
*/
/* Set all ports to the disabled state. */
for (i = 0; i < 8; i++) {
ret = REG_READ(REG_PORT(i), 0x04);
REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc);
}

/*
* Wait for transmit queues to drain.
*/
/* Wait for transmit queues to drain. */
msleep(2);

/*
* Reset the switch.
*/
/* Reset the switch. */
REG_WRITE(REG_GLOBAL, 0x04, 0xc400);

/*
* Wait up to one second for reset to complete.
*/
/* Wait up to one second for reset to complete. */
for (i = 0; i < 1000; i++) {
ret = REG_READ(REG_GLOBAL, 0x00);
if ((ret & 0xc800) == 0xc800)
Expand All @@ -90,54 +82,45 @@ static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
int ret;
int i;

/*
* Disable the PHY polling unit (since there won't be any
/* Disable the PHY polling unit (since there won't be any
* external PHYs to poll), don't discard packets with
* excessive collisions, and mask all interrupt sources.
*/
REG_WRITE(REG_GLOBAL, 0x04, 0x0000);

/*
* Set the default address aging time to 5 minutes, and
/* Set the default address aging time to 5 minutes, and
* enable address learn messages to be sent to all message
* ports.
*/
REG_WRITE(REG_GLOBAL, 0x0a, 0x0148);

/*
* Configure the priority mapping registers.
*/
/* Configure the priority mapping registers. */
ret = mv88e6xxx_config_prio(ds);
if (ret < 0)
return ret;

/*
* Configure the upstream port, and configure the upstream
/* Configure the upstream port, and configure the upstream
* port as the port to which ingress and egress monitor frames
* are to be sent.
*/
REG_WRITE(REG_GLOBAL, 0x1a, (dsa_upstream_port(ds) * 0x1110));

/*
* Disable remote management for now, and set the switch's
/* Disable remote management for now, and set the switch's
* DSA device number.
*/
REG_WRITE(REG_GLOBAL, 0x1c, ds->index & 0x1f);

/*
* Send all frames with destination addresses matching
/* Send all frames with destination addresses matching
* 01:80:c2:00:00:2x to the CPU port.
*/
REG_WRITE(REG_GLOBAL2, 0x02, 0xffff);

/*
* Send all frames with destination addresses matching
/* Send all frames with destination addresses matching
* 01:80:c2:00:00:0x to the CPU port.
*/
REG_WRITE(REG_GLOBAL2, 0x03, 0xffff);

/*
* Disable the loopback filter, disable flow control
/* Disable the loopback filter, disable flow control
* messages, disable flood broadcast override, disable
* removing of provider tags, disable ATU age violation
* interrupts, disable tag flow control, force flow
Expand All @@ -146,9 +129,7 @@ static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
*/
REG_WRITE(REG_GLOBAL2, 0x05, 0x00ff);

/*
* Program the DSA routing table.
*/
/* Program the DSA routing table. */
for (i = 0; i < 32; i++) {
int nexthop;

Expand All @@ -159,33 +140,24 @@ static int mv88e6123_61_65_setup_global(struct dsa_switch *ds)
REG_WRITE(REG_GLOBAL2, 0x06, 0x8000 | (i << 8) | nexthop);
}

/*
* Clear all trunk masks.
*/
/* Clear all trunk masks. */
for (i = 0; i < 8; i++)
REG_WRITE(REG_GLOBAL2, 0x07, 0x8000 | (i << 12) | 0xff);

/*
* Clear all trunk mappings.
*/
/* Clear all trunk mappings. */
for (i = 0; i < 16; i++)
REG_WRITE(REG_GLOBAL2, 0x08, 0x8000 | (i << 11));

/*
* Disable ingress rate limiting by resetting all ingress
/* Disable ingress rate limiting by resetting all ingress
* rate limit registers to their initial state.
*/
for (i = 0; i < 6; i++)
REG_WRITE(REG_GLOBAL2, 0x09, 0x9000 | (i << 8));

/*
* Initialise cross-chip port VLAN table to reset defaults.
*/
/* Initialise cross-chip port VLAN table to reset defaults. */
REG_WRITE(REG_GLOBAL2, 0x0b, 0x9000);

/*
* Clear the priority override table.
*/
/* Clear the priority override table. */
for (i = 0; i < 16; i++)
REG_WRITE(REG_GLOBAL2, 0x0f, 0x8000 | (i << 8));

Expand All @@ -199,8 +171,7 @@ static int mv88e6123_61_65_setup_port(struct dsa_switch *ds, int p)
int addr = REG_PORT(p);
u16 val;

/*
* MAC Forcing register: don't force link, speed, duplex
/* MAC Forcing register: don't force link, speed, duplex
* or flow control state to any particular values on physical
* ports, but force the CPU port and all DSA ports to 1000 Mb/s
* full duplex.
Expand All @@ -210,15 +181,13 @@ static int mv88e6123_61_65_setup_port(struct dsa_switch *ds, int p)
else
REG_WRITE(addr, 0x01, 0x0003);

/*
* Do not limit the period of time that this port can be
/* Do not limit the period of time that this port can be
* paused for by the remote end or the period of time that
* this port can pause the remote end.
*/
REG_WRITE(addr, 0x02, 0x0000);

/*
* Port Control: disable Drop-on-Unlock, disable Drop-on-Lock,
/* Port Control: disable Drop-on-Unlock, disable Drop-on-Lock,
* disable Header mode, enable IGMP/MLD snooping, disable VLAN
* tunneling, determine priority by looking at 802.1p and IP
* priority fields (IP prio has precedence), and set STP state
Expand All @@ -245,14 +214,12 @@ static int mv88e6123_61_65_setup_port(struct dsa_switch *ds, int p)
val |= 0x000c;
REG_WRITE(addr, 0x04, val);

/*
* Port Control 1: disable trunking. Also, if this is the
/* Port Control 1: disable trunking. Also, if this is the
* CPU port, enable learn messages to be sent to this port.
*/
REG_WRITE(addr, 0x05, dsa_is_cpu_port(ds, p) ? 0x8000 : 0x0000);

/*
* Port based VLAN map: give each port its own address
/* Port based VLAN map: give each port its own address
* database, allow the CPU port to talk to each of the 'real'
* ports, and allow each of the 'real' ports to only talk to
* the upstream port.
Expand All @@ -264,14 +231,12 @@ static int mv88e6123_61_65_setup_port(struct dsa_switch *ds, int p)
val |= 1 << dsa_upstream_port(ds);
REG_WRITE(addr, 0x06, val);

/*
* Default VLAN ID and priority: don't set a default VLAN
/* Default VLAN ID and priority: don't set a default VLAN
* ID, and set the default packet priority to zero.
*/
REG_WRITE(addr, 0x07, 0x0000);

/*
* Port Control 2: don't force a good FCS, set the maximum
/* Port Control 2: don't force a good FCS, set the maximum
* frame size to 10240 bytes, don't let the switch add or
* strip 802.1q tags, don't discard tagged or untagged frames
* on this port, do a destination address lookup on all
Expand All @@ -281,48 +246,36 @@ static int mv88e6123_61_65_setup_port(struct dsa_switch *ds, int p)
*/
REG_WRITE(addr, 0x08, 0x2080);

/*
* Egress rate control: disable egress rate control.
*/
/* Egress rate control: disable egress rate control. */
REG_WRITE(addr, 0x09, 0x0001);

/*
* Egress rate control 2: disable egress rate control.
*/
/* Egress rate control 2: disable egress rate control. */
REG_WRITE(addr, 0x0a, 0x0000);

/*
* Port Association Vector: when learning source addresses
/* Port Association Vector: when learning source addresses
* of packets, add the address to the address database using
* a port bitmap that has only the bit for this port set and
* the other bits clear.
*/
REG_WRITE(addr, 0x0b, 1 << p);

/*
* Port ATU control: disable limiting the number of address
/* Port ATU control: disable limiting the number of address
* database entries that this port is allowed to use.
*/
REG_WRITE(addr, 0x0c, 0x0000);

/*
* Priorit Override: disable DA, SA and VTU priority override.
*/
/* Priority Override: disable DA, SA and VTU priority override. */
REG_WRITE(addr, 0x0d, 0x0000);

/*
* Port Ethertype: use the Ethertype DSA Ethertype value.
*/
/* Port Ethertype: use the Ethertype DSA Ethertype value. */
REG_WRITE(addr, 0x0f, ETH_P_EDSA);

/*
* Tag Remap: use an identity 802.1p prio -> switch prio
/* Tag Remap: use an identity 802.1p prio -> switch prio
* mapping.
*/
REG_WRITE(addr, 0x18, 0x3210);

/*
* Tag Remap 2: use an identity 802.1p prio -> switch prio
/* Tag Remap 2: use an identity 802.1p prio -> switch prio
* mapping.
*/
REG_WRITE(addr, 0x19, 0x7654);
Expand Down
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