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yaml
---
r: 46718
b: refs/heads/master
c: 75e1317
h: refs/heads/master
v: v3
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Kenji Kaneshige authored and Greg Kroah-Hartman committed Feb 7, 2007
1 parent a84a63b commit 36cdd55
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Showing 2 changed files with 3 additions and 8 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 15232ece5566710d24c81ac3dd629f7556a92818
refs/heads/master: 75e13178af33e20b5802885f637af2a82c64ac2c
9 changes: 2 additions & 7 deletions trunk/drivers/pci/hotplug/pciehp_hpc.c
Original file line number Diff line number Diff line change
Expand Up @@ -105,7 +105,6 @@ enum ctrl_offsets {
ROOTCTRL = offsetof(struct ctrl_reg, root_ctrl),
ROOTSTATUS = offsetof(struct ctrl_reg, root_status),
};
static int pcie_cap_base = 0; /* Base of the PCI Express capability item structure */

static inline int pciehp_readw(struct controller *ctrl, int reg, u16 *value)
{
Expand Down Expand Up @@ -1072,7 +1071,7 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
u16 cap_reg;
u16 intr_enable = 0;
u32 slot_cap;
int cap_base, saved_cap_base;
int cap_base;
u16 slot_status, slot_ctrl;
struct pci_dev *pdev;

Expand All @@ -1084,16 +1083,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
dbg("%s: hotplug controller vendor id 0x%x device id 0x%x\n",
__FUNCTION__, pdev->vendor, pdev->device);

saved_cap_base = pcie_cap_base;

if ((cap_base = pci_find_capability(pdev, PCI_CAP_ID_EXP)) == 0) {
dbg("%s: Can't find PCI_CAP_ID_EXP (0x10)\n", __FUNCTION__);
goto abort_free_ctlr;
}

ctrl->cap_base = cap_base;

dbg("%s: pcie_cap_base %x\n", __FUNCTION__, pcie_cap_base);
dbg("%s: pcie_cap_base %x\n", __FUNCTION__, cap_base);

rc = pciehp_readw(ctrl, CAPREG, &cap_reg);
if (rc) {
Expand Down Expand Up @@ -1289,8 +1286,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
free_irq(ctrl->pci_dev->irq, ctrl);

abort_free_ctlr:
pcie_cap_base = saved_cap_base;

DBG_LEAVE_ROUTINE
return -1;
}

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