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powerpc/mm: Add SAO Feature bit to the cputable
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Add the CPU feature bit for the new Strong Access Ordering
facility of Power7

Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Joel Schopp <jschopp@austin.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Dave Kleikamp authored and Benjamin Herrenschmidt committed Jul 9, 2008
1 parent aba46c5 commit 3790704
Showing 1 changed file with 2 additions and 1 deletion.
3 changes: 2 additions & 1 deletion include/asm-powerpc/cputable.h
Original file line number Diff line number Diff line change
Expand Up @@ -186,6 +186,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004000000000000)
#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000)
#define CPU_FTR_VSX LONG_ASM_CONST(0x0010000000000000)
#define CPU_FTR_SAO LONG_ASM_CONST(0x0020000000000000)

#ifndef __ASSEMBLY__

Expand Down Expand Up @@ -401,7 +402,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
CPU_FTR_MMCRA | CPU_FTR_SMT | \
CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
CPU_FTR_DSCR)
CPU_FTR_DSCR | CPU_FTR_SAO)
#define CPU_FTRS_CELL (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
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