---

yaml
---
r: 376533
b: refs/heads/master
c: 2798389
h: refs/heads/master
i:
  376531: dabb480
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: f274ef8747d3be649bba8708696fb31cb00fa75a
+refs/heads/master: 279838960484fa22d903086eea743a6b6700647d

trunk/arch/powerpc/kernel/pci-common.c

@@ -657,15 +657,6 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar,
  *     ranges. However, some machines (thanks Apple !) tend to split their
  *     space into lots of small contiguous ranges. So we have to coalesce.
  *
- *   - We can only cope with all memory ranges having the same offset
- *     between CPU addresses and PCI addresses. Unfortunately, some bridges
- *     are setup for a large 1:1 mapping along with a small "window" which
- *     maps PCI address 0 to some arbitrary high address of the CPU space in
- *     order to give access to the ISA memory hole.
- *     The way out of here that I've chosen for now is to always set the
- *     offset based on the first resource found, then override it if we
- *     have a different offset and the previous was set by an ISA hole.
- *
  *   - Some busses have IO space not starting at 0, which causes trouble with
  *     the way we do our IO resource renumbering. The code somewhat deals with
  *     it for 64 bits but I would expect problems on 32 bits.