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yaml
---
r: 91282
b: refs/heads/master
c: 3c7d9c8
h: refs/heads/master
v: v3
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Ben Dooks authored and Russell King committed Apr 17, 2008
1 parent aaa09a2 commit 38ea58e
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Showing 4 changed files with 93 additions and 46 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: d96a980441a70168a8ead0a0f23c4c63725da5fa
refs/heads/master: 3c7d9c81e1302c244180e62999a08ca95b175cf5
27 changes: 27 additions & 0 deletions trunk/arch/arm/plat-s3c24xx/cpu.c
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Expand Up @@ -28,15 +28,19 @@
#include <linux/ioport.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/delay.h>

#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/delay.h>
#include <asm/cacheflush.h>

#include <asm/mach/arch.h>
#include <asm/mach/map.h>

#include <asm/arch/system-reset.h>

#include <asm/arch/regs-gpio.h>
#include <asm/plat-s3c/regs-serial.h>

Expand Down Expand Up @@ -203,6 +207,27 @@ static unsigned long s3c24xx_read_idcode_v4(void)
#endif
}

/* Hook for arm_pm_restart to ensure we execute the reset code
* with the caches enabled. It seems at least the S3C2440 has a problem
* resetting if there is bus activity interrupted by the reset.
*/
static void s3c24xx_pm_restart(char mode)
{
if (mode != 's') {
unsigned long flags;

local_irq_save(flags);
__cpuc_flush_kern_all();
__cpuc_flush_user_all();

arch_reset(mode);
local_irq_restore(flags);
}

/* fallback, or unhandled */
arm_machine_restart(mode);
}

void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
{
unsigned long idcode = 0x0;
Expand Down Expand Up @@ -230,6 +255,8 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
panic("Unsupported S3C24XX CPU");
}

arm_pm_restart = s3c24xx_pm_restart;

(cpu->map_io)(mach_desc, size);
}

Expand Down
64 changes: 64 additions & 0 deletions trunk/include/asm-arm/arch-s3c2410/system-reset.h
Original file line number Diff line number Diff line change
@@ -0,0 +1,64 @@
/* linux/include/asm-arm/arch-s3c2410/system-reset.h
*
* Copyright (c) 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - System define for arch_reset() function
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/

#include <asm/hardware.h>
#include <asm/io.h>

#include <asm/plat-s3c/regs-watchdog.h>
#include <asm/arch/regs-clock.h>

#include <linux/clk.h>
#include <linux/err.h>

extern void (*s3c24xx_reset_hook)(void);

static void
arch_reset(char mode)
{
struct clk *wdtclk;

if (mode == 's') {
cpu_reset(0);
}

if (s3c24xx_reset_hook)
s3c24xx_reset_hook();

printk("arch_reset: attempting watchdog reset\n");

__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */

wdtclk = clk_get(NULL, "watchdog");
if (!IS_ERR(wdtclk)) {
clk_enable(wdtclk);
} else
printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);

/* put initial values into count and data */
__raw_writel(0x80, S3C2410_WTCNT);
__raw_writel(0x80, S3C2410_WTDAT);

/* set the watchdog to go and reset... */
__raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);

/* wait for reset to assert... */
mdelay(500);

printk(KERN_ERR "Watchdog reset failed to assert reset\n");

/* delay to allow the serial port to show the message */
mdelay(50);

/* we'll take a jump through zero as a poor second */
cpu_reset(0);
}
46 changes: 1 addition & 45 deletions trunk/include/asm-arm/arch-s3c2410/system.h
Original file line number Diff line number Diff line change
Expand Up @@ -17,12 +17,8 @@
#include <asm/arch/idle.h>
#include <asm/arch/reset.h>

#include <asm/plat-s3c/regs-watchdog.h>
#include <asm/arch/regs-clock.h>

#include <linux/clk.h>
#include <linux/err.h>

void (*s3c24xx_idle)(void);
void (*s3c24xx_reset_hook)(void);

Expand Down Expand Up @@ -59,44 +55,4 @@ static void arch_idle(void)
s3c24xx_default_idle();
}

static void
arch_reset(char mode)
{
struct clk *wdtclk;

if (mode == 's') {
cpu_reset(0);
}

if (s3c24xx_reset_hook)
s3c24xx_reset_hook();

printk("arch_reset: attempting watchdog reset\n");

__raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */

wdtclk = clk_get(NULL, "watchdog");
if (!IS_ERR(wdtclk)) {
clk_enable(wdtclk);
} else
printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);

/* put initial values into count and data */
__raw_writel(0x80, S3C2410_WTCNT);
__raw_writel(0x80, S3C2410_WTDAT);

/* set the watchdog to go and reset... */
__raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);

/* wait for reset to assert... */
mdelay(500);

printk(KERN_ERR "Watchdog reset failed to assert reset\n");

/* delay to allow the serial port to show the message */
mdelay(50);

/* we'll take a jump through zero as a poor second */
cpu_reset(0);
}
#include <asm/arch/system-reset.h>

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