Skip to content

Commit

Permalink
gma500: Set the mapping mask
Browse files Browse the repository at this point in the history
Some boards such as the Intel D2700MUD allow you to have over 4GB of RAM.
The GTT on the PVR based devices is 32bit however. Hugh Dickins points out
that we should therefore be setting the mapping gfp mask.

This is not the whole fix for the problem. Some further shmem patches will
be needed to deal with the corner cases.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
  • Loading branch information
Alan Cox authored and Dave Airlie committed Apr 27, 2012
1 parent ae0a246 commit 398b470
Show file tree
Hide file tree
Showing 2 changed files with 6 additions and 0 deletions.
2 changes: 2 additions & 0 deletions drivers/gpu/drm/gma500/gem.c
Original file line number Diff line number Diff line change
Expand Up @@ -124,6 +124,8 @@ static int psb_gem_create(struct drm_file *file,
dev_err(dev->dev, "GEM init failed for %lld\n", size);
return -ENOMEM;
}
/* Limit the object to 32bit mappings */
mapping_set_gfp_mask(r->gem.filp->f_mapping, GFP_KERNEL | __GFP_DMA32);
/* Give the object a handle so we can carry it more easily */
ret = drm_gem_handle_create(file, &r->gem, &handle);
if (ret) {
Expand Down
4 changes: 4 additions & 0 deletions drivers/gpu/drm/gma500/gtt.c
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,10 @@ static inline uint32_t psb_gtt_mask_pte(uint32_t pfn, int type)
{
uint32_t mask = PSB_PTE_VALID;

/* Ensure we explode rather than put an invalid low mapping of
a high mapping page into the gtt */
BUG_ON(pfn & ~(0xFFFFFFFF >> PAGE_SHIFT));

if (type & PSB_MMU_CACHED_MEMORY)
mask |= PSB_PTE_CACHED;
if (type & PSB_MMU_RO_MEMORY)
Expand Down

0 comments on commit 398b470

Please sign in to comment.