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yaml
---
r: 317355
b: refs/heads/master
c: 6d12dae
h: refs/heads/master
i:
  317353: 430d6db
  317351: 6b406d7
v: v3
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Peter Huewe authored and Greg Kroah-Hartman committed Jun 14, 2012
1 parent 78fbca2 commit 398facc
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Showing 6 changed files with 68 additions and 200 deletions.
2 changes: 1 addition & 1 deletion [refs]
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Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: 51f984bc068c8704221a8eddd96b580eafcd2912
refs/heads/master: 6d12dae47e8c93da24d54a402a48dab0958083ca
19 changes: 19 additions & 0 deletions trunk/drivers/staging/xgifb/vb_def.h
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Original file line number Diff line number Diff line change
Expand Up @@ -264,4 +264,23 @@
#define RES1280x960x85 0x46
#define RES1280x960x120 0x47


#define XG27_CR8F 0x0C
#define XG27_SR36 0x30
#define XG27_SR40 0x04
#define XG27_SR41 0x00
#define XG40_CRCF 0x13
#define XGI330_CRT2Data_1_2 0
#define XGI330_CRT2Data_4_D 0
#define XGI330_CRT2Data_4_E 0
#define XGI330_CRT2Data_4_10 0x80
#define XGI330_SR07 0x18
#define XGI330_SR1F 0
#define XGI330_SR23 0xf6
#define XGI330_SR24 0x0d
#define XGI330_SR25 0
#define XGI330_SR31 0xc0
#define XGI330_SR32 0x11
#define XGI330_SR33 0

#endif
96 changes: 38 additions & 58 deletions trunk/drivers/staging/xgifb/vb_init.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,6 @@
#include "vb_def.h"
#include "vb_util.h"
#include "vb_setmode.h"

static const unsigned short XGINew_DDRDRAM_TYPE340[4][2] = {
{ 16, 0x45},
{ 8, 0x35},
Expand Down Expand Up @@ -35,21 +34,12 @@ XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceExtension,
unsigned char data, temp;

if (HwDeviceExtension->jChipType < XG20) {
if (*pVBInfo->pSoftSetting & SoftDRAMType) {
data = *pVBInfo->pSoftSetting & 0x07;
return data;
} else {
data = xgifb_reg_get(pVBInfo->P3c4, 0x39) & 0x02;
if (data == 0)
data = (xgifb_reg_get(pVBInfo->P3c4, 0x3A) &
0x02) >> 1;
return data;
}
data = xgifb_reg_get(pVBInfo->P3c4, 0x39) & 0x02;
if (data == 0)
data = (xgifb_reg_get(pVBInfo->P3c4, 0x3A) &
0x02) >> 1;
return data;
} else if (HwDeviceExtension->jChipType == XG27) {
if (*pVBInfo->pSoftSetting & SoftDRAMType) {
data = *pVBInfo->pSoftSetting & 0x07;
return data;
}
temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B);
/* SR3B[7][3]MAA15 MAA11 (Power on Trapping) */
if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08))
Expand Down Expand Up @@ -92,13 +82,11 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4,
xgifb_reg_set(P3c4, 0x16, 0x00);
xgifb_reg_set(P3c4, 0x16, 0x80);

if (*pVBInfo->pXGINew_DRAMTypeDefinition != 0x0C) { /* Samsung F Die */
mdelay(3);
xgifb_reg_set(P3c4, 0x18, 0x00);
xgifb_reg_set(P3c4, 0x19, 0x20);
xgifb_reg_set(P3c4, 0x16, 0x00);
xgifb_reg_set(P3c4, 0x16, 0x80);
}
mdelay(3);
xgifb_reg_set(P3c4, 0x18, 0x00);
xgifb_reg_set(P3c4, 0x19, 0x20);
xgifb_reg_set(P3c4, 0x16, 0x00);
xgifb_reg_set(P3c4, 0x16, 0x80);

udelay(60);
xgifb_reg_set(P3c4,
Expand Down Expand Up @@ -172,7 +160,7 @@ static void XGINew_DDRII_Bootup_XG27(

/* Set Double Frequency */
/* xgifb_reg_set(P3d4, 0x97, 0x11); *//* CR97 */
xgifb_reg_set(P3d4, 0x97, *pVBInfo->pXGINew_CR97); /* CR97 */
xgifb_reg_set(P3d4, 0x97, pVBInfo->XGINew_CR97); /* CR97 */

udelay(200);

Expand Down Expand Up @@ -532,7 +520,7 @@ static void XGINew_SetDRAMDefaultRegister340(
pVBInfo->CR40[0][pVBInfo->ram_type]); /* CR41 */

if (HwDeviceExtension->jChipType == XG27)
xgifb_reg_set(P3d4, 0x8F, *pVBInfo->pCR8F); /* CR8F */
xgifb_reg_set(P3d4, 0x8F, XG27_CR8F); /* CR8F */

for (j = 0; j <= 6; j++) /* CR90 - CR96 */
xgifb_reg_set(P3d4, (0x90 + j),
Expand All @@ -555,7 +543,7 @@ static void XGINew_SetDRAMDefaultRegister340(

xgifb_reg_set(P3d4, 0x83, 0x09); /* CR83 */
xgifb_reg_set(P3d4, 0x87, 0x00); /* CR87 */
xgifb_reg_set(P3d4, 0xCF, *pVBInfo->pCRCF); /* CRCF */
xgifb_reg_set(P3d4, 0xCF, XG40_CRCF); /* CRCF */
if (pVBInfo->ram_type) {
/* xgifb_reg_set(P3c4, 0x17, 0xC0); */ /* SR17 DDRII */
xgifb_reg_set(P3c4, 0x17, 0x80); /* SR17 DDRII */
Expand Down Expand Up @@ -1075,13 +1063,9 @@ static void XGINew_ChkSenseStatus(struct xgi_hw_device_info *HwDeviceExtension,
CR3CData = xgifb_reg_get(pVBInfo->P3d4, 0x3c);
if (!(CR3CData & DisplayDeviceFromCMOS)) {
tempcx = 0x1FF0;
if (*pVBInfo->pSoftSetting & ModeSoftSetting)
tempbx = 0x1FF0;
}
} else {
tempcx = 0x1FF0;
if (*pVBInfo->pSoftSetting & ModeSoftSetting)
tempbx = 0x1FF0;
}

tempbx &= tempcx;
Expand Down Expand Up @@ -1425,7 +1409,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
printk("10");

if (HwDeviceExtension->jChipType >= XG20)
xgifb_reg_set(pVBInfo->P3d4, 0x97, *pVBInfo->pXGINew_CR97);
xgifb_reg_set(pVBInfo->P3d4, 0x97, pVBInfo->XGINew_CR97);

/* 3.SetMemoryClock
Expand All @@ -1435,20 +1419,20 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
printk("11");

/* 4.SetDefExt1Regs begin */
xgifb_reg_set(pVBInfo->P3c4, 0x07, *pVBInfo->pSR07);
xgifb_reg_set(pVBInfo->P3c4, 0x07, XGI330_SR07);
if (HwDeviceExtension->jChipType == XG27) {
xgifb_reg_set(pVBInfo->P3c4, 0x40, *pVBInfo->pSR40);
xgifb_reg_set(pVBInfo->P3c4, 0x41, *pVBInfo->pSR41);
xgifb_reg_set(pVBInfo->P3c4, 0x40, XG27_SR40);
xgifb_reg_set(pVBInfo->P3c4, 0x41, XG27_SR41);
}
xgifb_reg_set(pVBInfo->P3c4, 0x11, 0x0F);
xgifb_reg_set(pVBInfo->P3c4, 0x1F, *pVBInfo->pSR1F);
xgifb_reg_set(pVBInfo->P3c4, 0x1F, XGI330_SR1F);
/* xgifb_reg_set(pVBInfo->P3c4, 0x20, 0x20); */
/* alan, 2001/6/26 Frame buffer can read/write SR20 */
xgifb_reg_set(pVBInfo->P3c4, 0x20, 0xA0);
/* Hsuan, 2006/01/01 H/W request for slow corner chip */
xgifb_reg_set(pVBInfo->P3c4, 0x36, 0x70);
if (HwDeviceExtension->jChipType == XG27) /* Alan 12/07/2006 */
xgifb_reg_set(pVBInfo->P3c4, 0x36, *pVBInfo->pSR36);
xgifb_reg_set(pVBInfo->P3c4, 0x36, XG27_SR36);

/* SR11 = 0x0F; */
/* xgifb_reg_set(pVBInfo->P3c4, 0x11, SR11); */
Expand Down Expand Up @@ -1534,9 +1518,9 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
} /* != XG20 */

/* Set PCI */
xgifb_reg_set(pVBInfo->P3c4, 0x23, *pVBInfo->pSR23);
xgifb_reg_set(pVBInfo->P3c4, 0x24, *pVBInfo->pSR24);
xgifb_reg_set(pVBInfo->P3c4, 0x25, pVBInfo->SR25[0]);
xgifb_reg_set(pVBInfo->P3c4, 0x23, XGI330_SR23);
xgifb_reg_set(pVBInfo->P3c4, 0x24, XGI330_SR24);
xgifb_reg_set(pVBInfo->P3c4, 0x25, XGI330_SR25);
printk("15");

if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */
Expand All @@ -1550,8 +1534,7 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
temp = (unsigned char) ((temp1 >> 4) & 0x0F);

xgifb_reg_set(pVBInfo->Part1Port,
0x02,
(*pVBInfo->pCRT2Data_1_2));
0x02, XGI330_CRT2Data_1_2);

printk("16");

Expand All @@ -1565,15 +1548,15 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
/* Not DDR */
xgifb_reg_set(pVBInfo->P3c4,
0x31,
(*pVBInfo->pSR31 & 0x3F) | 0x40);
(XGI330_SR31 & 0x3F) | 0x40);
xgifb_reg_set(pVBInfo->P3c4,
0x32,
(*pVBInfo->pSR32 & 0xFC) | 0x01);
(XGI330_SR32 & 0xFC) | 0x01);
} else {
xgifb_reg_set(pVBInfo->P3c4, 0x31, *pVBInfo->pSR31);
xgifb_reg_set(pVBInfo->P3c4, 0x32, *pVBInfo->pSR32);
xgifb_reg_set(pVBInfo->P3c4, 0x31, XGI330_SR31);
xgifb_reg_set(pVBInfo->P3c4, 0x32, XGI330_SR32);
}
xgifb_reg_set(pVBInfo->P3c4, 0x33, *pVBInfo->pSR33);
xgifb_reg_set(pVBInfo->P3c4, 0x33, XGI330_SR33);
printk("17");

/*
Expand All @@ -1584,14 +1567,11 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
if (pVBInfo->IF_DEF_LVDS == 0) {
xgifb_reg_set(pVBInfo->Part2Port, 0x00, 0x1C);
xgifb_reg_set(pVBInfo->Part4Port,
0x0D,
*pVBInfo->pCRT2Data_4_D);
0x0D, XGI330_CRT2Data_4_D);
xgifb_reg_set(pVBInfo->Part4Port,
0x0E,
*pVBInfo->pCRT2Data_4_E);
0x0E, XGI330_CRT2Data_4_E);
xgifb_reg_set(pVBInfo->Part4Port,
0x10,
*pVBInfo->pCRT2Data_4_10);
0x10, XGI330_CRT2Data_4_10);
xgifb_reg_set(pVBInfo->Part4Port, 0x0F, 0x3F);
}

Expand Down Expand Up @@ -1651,25 +1631,25 @@ unsigned char XGIInitNew(struct pci_dev *pdev)
AGP = 0;
if (AGP == 0)
*pVBInfo->pSR21 &= 0xEF;
pVBInfo->SR21 &= 0xEF;
xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21);
xgifb_reg_set(pVBInfo->P3c4, 0x21, pVBInfo->SR21);
if (AGP == 1)
*pVBInfo->pSR22 &= 0x20;
xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22);
pVBInfo->SR22 &= 0x20;
xgifb_reg_set(pVBInfo->P3c4, 0x22, pVBInfo->SR22);
*/
/* base = 0x80000000; */
/* OutPortLong(0xcf8, base); */
/* Temp = (InPortLong(0xcfc) & 0xFFFF); */
/* if (Temp == 0x1039) { */
xgifb_reg_set(pVBInfo->P3c4,
0x22,
(unsigned char) ((*pVBInfo->pSR22) & 0xFE));
(unsigned char) ((pVBInfo->SR22) & 0xFE));
/* } else { */
/* xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); */
/* xgifb_reg_set(pVBInfo->P3c4, 0x22, pVBInfo->SR22); */
/* } */

xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21);
xgifb_reg_set(pVBInfo->P3c4, 0x21, pVBInfo->SR21);

printk("23");

Expand Down
59 changes: 6 additions & 53 deletions trunk/drivers/staging/xgifb/vb_setmode.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -38,9 +38,6 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
pVBInfo->ModeResInfo
= (struct SiS_ModeResInfo_S *) XGI330_ModeResInfo;

pVBInfo->pOutputSelect = &XGI330_OutputSelect;
pVBInfo->pSoftSetting = &XGI330_SoftSetting;
pVBInfo->pSR07 = &XGI330_SR07;
pVBInfo->LCDResInfo = 0;
pVBInfo->LCDTypeInfo = 0;
pVBInfo->LCDInfo = 0;
Expand All @@ -49,36 +46,15 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)

pVBInfo->SR15 = XGI340_SR13;
pVBInfo->CR40 = XGI340_cr41;
pVBInfo->SR25 = XGI330_sr25;
pVBInfo->pSR31 = &XGI330_sr31;
pVBInfo->pSR32 = &XGI330_sr32;
pVBInfo->CR6B = XGI340_CR6B;
pVBInfo->CR6E = XGI340_CR6E;
pVBInfo->CR6F = XGI340_CR6F;
pVBInfo->CR89 = XGI340_CR89;
pVBInfo->AGPReg = XGI340_AGPReg;
pVBInfo->SR16 = XGI340_SR16;
pVBInfo->pCRCF = &XG40_CRCF;
pVBInfo->pXGINew_DRAMTypeDefinition = &XG40_DRAMTypeDefinition;

pVBInfo->CR49 = XGI330_CR49;
pVBInfo->pSR1F = &XGI330_SR1F;
pVBInfo->pSR21 = &XGI330_SR21;
pVBInfo->pSR22 = &XGI330_SR22;
pVBInfo->pSR23 = &XGI330_SR23;
pVBInfo->pSR24 = &XGI330_SR24;
pVBInfo->pSR33 = &XGI330_SR33;

pVBInfo->pCRT2Data_1_2 = &XGI330_CRT2Data_1_2;
pVBInfo->pCRT2Data_4_D = &XGI330_CRT2Data_4_D;
pVBInfo->pCRT2Data_4_E = &XGI330_CRT2Data_4_E;
pVBInfo->pCRT2Data_4_10 = &XGI330_CRT2Data_4_10;
pVBInfo->pRGBSenseData = &XGI330_RGBSenseData;
pVBInfo->pVideoSenseData = &XGI330_VideoSenseData;
pVBInfo->pYCSenseData = &XGI330_YCSenseData;
pVBInfo->pRGBSenseData2 = &XGI330_RGBSenseData2;
pVBInfo->pVideoSenseData2 = &XGI330_VideoSenseData2;
pVBInfo->pYCSenseData2 = &XGI330_YCSenseData2;

pVBInfo->SR21 = 0xa3;
pVBInfo->SR22 = 0xfb;

pVBInfo->NTSCTiming = XGI330_NTSCTiming;
pVBInfo->PALTiming = XGI330_PALTiming;
Expand All @@ -105,38 +81,22 @@ void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
else
pVBInfo->LCDCapList = XGI_LCDCapList;

pVBInfo->pXGINew_I2CDefinition = &XG40_I2CDefinition;

if (ChipType >= XG20)
pVBInfo->pXGINew_CR97 = &XG20_CR97;
pVBInfo->XGINew_CR97 = 0x10;

if (ChipType == XG27) {
unsigned char temp;
pVBInfo->MCLKData
= (struct SiS_MCLKData *) XGI27New_MCLKData;
pVBInfo->CR40 = XGI27_cr41;
pVBInfo->pXGINew_CR97 = &XG27_CR97;
pVBInfo->pSR36 = &XG27_SR36;
pVBInfo->pCR8F = &XG27_CR8F;
pVBInfo->pCRD0 = XG27_CRD0;
pVBInfo->pCRDE = XG27_CRDE;
pVBInfo->pSR40 = &XG27_SR40;
pVBInfo->pSR41 = &XG27_SR41;
pVBInfo->XGINew_CR97 = 0xc1;
pVBInfo->SR15 = XG27_SR13;

/*Z11m DDR*/
temp = xgifb_reg_get(pVBInfo->P3c4, 0x3B);
/* SR3B[7][3]MAA15 MAA11 (Power on Trapping) */
if (((temp & 0x88) == 0x80) || ((temp & 0x88) == 0x08))
pVBInfo->pXGINew_CR97 = &Z11m_CR97;
}

if (ChipType >= XG20) {
pVBInfo->pDVOSetting = &XG21_DVOSetting;
pVBInfo->pCR2E = &XG21_CR2E;
pVBInfo->pCR2F = &XG21_CR2F;
pVBInfo->pCR46 = &XG21_CR46;
pVBInfo->pCR47 = &XG21_CR47;
pVBInfo->XGINew_CR97 = 0x80;
}

}
Expand Down Expand Up @@ -783,13 +743,6 @@ static void xgifb_set_lcd(int chip_id,
}
}

if (((*pVBInfo->pDVOSetting) & 0xC0) == 0xC0) {
xgifb_reg_set(pVBInfo->P3d4, 0x2E, *pVBInfo->pCR2E);
xgifb_reg_set(pVBInfo->P3d4, 0x2F, *pVBInfo->pCR2F);
xgifb_reg_set(pVBInfo->P3d4, 0x46, *pVBInfo->pCR46);
xgifb_reg_set(pVBInfo->P3d4, 0x47, *pVBInfo->pCR47);
}

if (chip_id == XG27) {
XGI_SetXG27FPBits(pVBInfo);
} else {
Expand Down
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