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yaml
---
r: 272775
b: refs/heads/master
c: de7164d
h: refs/heads/master
i:
  272773: 34c9357
  272771: 3fc5a19
  272767: e423c38
v: v3
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Marc Dietrich authored and Olof Johansson committed Aug 9, 2011
1 parent 1392bf8 commit 3a0c9c6
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Showing 2 changed files with 12 additions and 1 deletion.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: bc24ed4f21c0ef6d99b653077747c3104f5f9b60
refs/heads/master: de7164db70af94e58dca84426374138cd3a18f34
11 changes: 11 additions & 0 deletions trunk/arch/arm/mach-tegra/board-paz00.c
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,16 @@

static struct plat_serial8250_port debug_uart_platform_data[] = {
{
/* serial port on JP1 */
.membase = IO_ADDRESS(TEGRA_UARTA_BASE),
.mapbase = TEGRA_UARTA_BASE,
.irq = INT_UARTA,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 216000000,
}, {
/* serial port on mini-pcie */
.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
.mapbase = TEGRA_UARTD_BASE,
.irq = INT_UARTD,
Expand Down Expand Up @@ -94,6 +104,7 @@ static void __init tegra_paz00_fixup(struct machine_desc *desc,

static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
/* name parent rate enabled */
{ "uarta", "pll_p", 216000000, true },
{ "uartd", "pll_p", 216000000, true },
{ NULL, NULL, 0, 0},
};
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