---

yaml
---
r: 190523
b: refs/heads/master
c: c10f5e1
h: refs/heads/master
i:
  190521: 12595b2
  190519: 5e731ea
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 37e27e36bc416b07d853d493e6818d6a785507a2
+refs/heads/master: c10f5e12bafde7f7a2f9b75d76f7a68d62154e91

trunk/Documentation/spi/spidev_test.c

@@ -58,7 +58,7 @@ static void transfer(int fd)
 	};
 
 	ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr);
-	if (ret < 1)
+	if (ret == 1)
 		pabort("can't send spi message");
 
 	for (ret = 0; ret < ARRAY_SIZE(tx); ret++) {

trunk/arch/arm/plat-omap/include/plat/usb.h

@@ -46,7 +46,7 @@ struct ehci_hcd_omap_platform_data {
 struct omap_musb_board_data {
 	u8	interface_type;
 	u8	mode;
-	u16	power;
+	u8	power;
 };
 
 enum musb_interface    {MUSB_INTERFACE_ULPI, MUSB_INTERFACE_UTMI};

trunk/arch/mips/Kconfig

@@ -49,7 +49,7 @@ config AR7
 	  family: TNETD7100, 7200 and 7300.
 
 config BCM47XX
-	bool "Broadcom BCM47XX based boards"
+	bool "BCM47XX based boards"
 	select CEVT_R4K
 	select CSRC_R4K
 	select DMA_NONCOHERENT
@@ -509,7 +509,6 @@ config SIBYTE_SWARM
 	bool "Sibyte BCM91250A-SWARM"
 	select BOOT_ELF32
 	select DMA_COHERENT
-	select HAVE_PATA_PLATFORM
 	select NR_CPUS_DEFAULT_2
 	select SIBYTE_SB1250
 	select SWAP_IO_SPACE
@@ -524,7 +523,6 @@ config SIBYTE_LITTLESUR
 	depends on EXPERIMENTAL
 	select BOOT_ELF32
 	select DMA_COHERENT
-	select HAVE_PATA_PLATFORM
 	select NR_CPUS_DEFAULT_2
 	select SIBYTE_SB1250
 	select SWAP_IO_SPACE
@@ -1307,33 +1305,6 @@ config CPU_CAVIUM_OCTEON
 
 endchoice
 
-if CPU_LOONGSON2F
-config CPU_NOP_WORKAROUNDS
-	bool
-
-config CPU_JUMP_WORKAROUNDS
-	bool
-
-config CPU_LOONGSON2F_WORKAROUNDS
-	bool "Loongson 2F Workarounds"
-	default y
-	select CPU_NOP_WORKAROUNDS
-	select CPU_JUMP_WORKAROUNDS
-	help
-	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
-	  require workarounds.  Without workarounds the system may hang
-	  unexpectedly.  For more information please refer to the gas
-	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
-
-	  Loongson 2F03 and later have fixed these issues and no workarounds
-	  are needed.  The workarounds have no significant side effect on them
-	  but may decrease the performance of the system so this option should
-	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
-	  systems.
-
-	  If unsure, please say Y.
-endif # CPU_LOONGSON2F
-
 config SYS_SUPPORTS_ZBOOT
 	bool
 	select HAVE_KERNEL_GZIP

trunk/arch/mips/Makefile

@@ -136,19 +136,6 @@ cflags-$(CONFIG_CPU_LOONGSON2E) += \
 	$(call cc-option,-march=loongson2e,-march=r4600)
 cflags-$(CONFIG_CPU_LOONGSON2F) += \
 	$(call cc-option,-march=loongson2f,-march=r4600)
-# enable the workarounds for loongson2f
-ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
-  ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-nop,),)
-    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-nop)
-  else
-    cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-nop
-  endif
-  ifeq ($(call as-option,-Wa$(comma)-mfix-loongson2f-jump,),)
-    $(error only binutils >= 2.20.2 have needed option -mfix-loongson2f-jump)
-  else
-    cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa$(comma)-mfix-loongson2f-jump
-  endif
-endif
 
 cflags-$(CONFIG_CPU_MIPS32_R1)	+= $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
 			-Wa,-mips32 -Wa,--trap

trunk/arch/mips/alchemy/devboards/db1200/setup.c

@@ -66,16 +66,12 @@ static int __init db1200_arch_init(void)
 	set_irq_type(AU1200_GPIO7_INT, IRQF_TRIGGER_LOW);
 	bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
 
-	/* insert/eject pairs: one of both is always screaming.  To avoid
-	 * issues they must not be automatically enabled when initially
-	 * requested.
+	/* do not autoenable these: CPLD has broken edge int handling,
+	 * and the CD handler setup requires manual enabling to work
+	 * around that.
 	 */
 	irq_to_desc(DB1200_SD0_INSERT_INT)->status |= IRQ_NOAUTOEN;
 	irq_to_desc(DB1200_SD0_EJECT_INT)->status |= IRQ_NOAUTOEN;
-	irq_to_desc(DB1200_PC0_INSERT_INT)->status |= IRQ_NOAUTOEN;
-	irq_to_desc(DB1200_PC0_EJECT_INT)->status |= IRQ_NOAUTOEN;
-	irq_to_desc(DB1200_PC1_INSERT_INT)->status |= IRQ_NOAUTOEN;
-	irq_to_desc(DB1200_PC1_EJECT_INT)->status |= IRQ_NOAUTOEN;
 
 	return 0;
 }