---

yaml
---
r: 11127
b: refs/heads/master
c: a5fc9c0
h: refs/heads/master
i:
  11125: c01e1bc
  11123: 66ceb24
  11119: abdb6f2
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 7d7ee221213609319401d1b9d6dc4bf22ab928ea
+refs/heads/master: a5fc9c0bbee8b91025993a49a9176a88380aef3c

trunk/arch/mips/dec/ecc-berr.c

@@ -227,11 +227,11 @@ irqreturn_t dec_ecc_be_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  */
 static inline void dec_kn02_be_init(void)
 {
-	volatile u32 *csr = (void *)KN02_CSR_BASE;
+	volatile u32 *csr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR);
 	unsigned long flags;
 
-	kn0x_erraddr = (void *)(KN02_SLOT_BASE + KN02_ERRADDR);
-	kn0x_chksyn = (void *)(KN02_SLOT_BASE + KN02_CHKSYN);
+	kn0x_erraddr = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_ERRADDR);
+	kn0x_chksyn = (void *)CKSEG1ADDR(KN02_SLOT_BASE + KN02_CHKSYN);
 
 	spin_lock_irqsave(&kn02_lock, flags);
 
@@ -250,11 +250,11 @@ static inline void dec_kn02_be_init(void)
 
 static inline void dec_kn03_be_init(void)
 {
-	volatile u32 *mcr = (void *)(KN03_SLOT_BASE + IOASIC_MCR);
-	volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR);
+	volatile u32 *mcr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_MCR);
+	volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
 
-	kn0x_erraddr = (void *)(KN03_SLOT_BASE + IOASIC_ERRADDR);
-	kn0x_chksyn = (void *)(KN03_SLOT_BASE + IOASIC_CHKSYN);
+	kn0x_erraddr = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_ERRADDR);
+	kn0x_chksyn = (void *)CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_CHKSYN);
 
 	/*
 	 * Set normal ECC detection and generation, enable ECC correction.

trunk/arch/mips/dec/int-handler.S

@@ -2,9 +2,9 @@
  * arch/mips/dec/int-handler.S
  *
  * Copyright (C) 1995, 1996, 1997 Paul M. Antoine and Harald Koerfgen
- * Copyright (C) 2000, 2001, 2002, 2003  Maciej W. Rozycki
+ * Copyright (C) 2000, 2001, 2002, 2003, 2005  Maciej W. Rozycki
  *
- * Written by Ralf Baechle and Andreas Busse, modified for DECStation
+ * Written by Ralf Baechle and Andreas Busse, modified for DECstation
  * support by Paul Antoine and Harald Koerfgen.
  *
  * completly rewritten:
@@ -14,11 +14,12 @@
  * by Maciej W. Rozycki.
  */
 #include <linux/config.h>
+
+#include <asm/addrspace.h>
 #include <asm/asm.h>
-#include <asm/regdef.h>
 #include <asm/mipsregs.h>
+#include <asm/regdef.h>
 #include <asm/stackframe.h>
-#include <asm/addrspace.h>
 
 #include <asm/dec/interrupts.h>
 #include <asm/dec/ioasic_addrs.h>
@@ -28,11 +29,14 @@
 #include <asm/dec/kn02xa.h>
 #include <asm/dec/kn03.h>
 
+#define KN02_CSR_BASE		CKSEG1ADDR(KN02_SLOT_BASE + KN02_CSR)
+#define KN02XA_IOASIC_BASE	CKSEG1ADDR(KN02XA_SLOT_BASE + IOASIC_IOCTL)
+#define KN03_IOASIC_BASE	CKSEG1ADDR(KN03_SLOT_BASE + IOASIC_IOCTL)
 
 		.text
 		.set	noreorder
 /*
- * decstation_handle_int: Interrupt handler for DECStations
+ * decstation_handle_int: Interrupt handler for DECstations
  *
  * We follow the model in the Indy interrupt code by David Miller, where he
  * says: a lot of complication here is taken away because:
@@ -48,7 +52,7 @@
  * 3) Linux only thinks in terms of all IRQs on or all IRQs
  *    off, nothing in between like BSD spl() brain-damage.
  *
- * Furthermore, the IRQs on the DECStations look basically (barring
+ * Furthermore, the IRQs on the DECstations look basically (barring
  * software IRQs which we don't use at all) like...
  *
  * DS2100/3100's, aka kn01, aka Pmax:
@@ -61,7 +65,7 @@
  *             3        Lance Ethernet
  *             4        DZ11 serial
  *             5        RTC
- *             6        Memory Controller
+ *             6        Memory Controller & Video
  *             7        FPU
  *
  * DS5000/200, aka kn02, aka 3max:

trunk/arch/mips/dec/kn01-berr.c

@@ -51,7 +51,7 @@ DEFINE_SPINLOCK(kn01_lock);
 
 static inline void dec_kn01_be_ack(void)
 {
-	volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR);
+	volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
 	unsigned long flags;
 
 	spin_lock_irqsave(&kn01_lock, flags);
@@ -64,7 +64,8 @@ static inline void dec_kn01_be_ack(void)
 
 static int dec_kn01_be_backend(struct pt_regs *regs, int is_fixup, int invoker)
 {
-	volatile u32 *kn01_erraddr = (void *)(KN01_SLOT_BASE + KN01_ERRADDR);
+	volatile u32 *kn01_erraddr = (void *)CKSEG1ADDR(KN01_SLOT_BASE +
+							KN01_ERRADDR);
 
 	static const char excstr[] = "exception";
 	static const char intstr[] = "interrupt";
@@ -152,7 +153,7 @@ int dec_kn01_be_handler(struct pt_regs *regs, int is_fixup)
 irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
 				    struct pt_regs *regs)
 {
-	volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR);
+	volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
 	int action;
 
 	if (!(*csr & KN01_CSR_MEMERR))
@@ -178,7 +179,7 @@ irqreturn_t dec_kn01_be_interrupt(int irq, void *dev_id,
 
 void __init dec_kn01_be_init(void)
 {
-	volatile u16 *csr = (void *)(KN01_SLOT_BASE + KN01_CSR);
+	volatile u16 *csr = (void *)CKSEG1ADDR(KN01_SLOT_BASE + KN01_CSR);
 	unsigned long flags;
 
 	spin_lock_irqsave(&kn01_lock, flags);

trunk/arch/mips/dec/kn02-irq.c

@@ -37,15 +37,17 @@ static int kn02_irq_base;
 
 static inline void unmask_kn02_irq(unsigned int irq)
 {
-	volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
+	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
+						       KN02_CSR);
 
 	cached_kn02_csr |= (1 << (irq - kn02_irq_base + 16));
 	*csr = cached_kn02_csr;
 }
 
 static inline void mask_kn02_irq(unsigned int irq)
 {
-	volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
+	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
+						       KN02_CSR);
 
 	cached_kn02_csr &= ~(1 << (irq - kn02_irq_base + 16));
 	*csr = cached_kn02_csr;
@@ -105,7 +107,8 @@ static struct hw_interrupt_type kn02_irq_type = {
 
 void __init init_kn02_irqs(int base)
 {
-	volatile u32 *csr = (volatile u32 *)KN02_CSR_BASE;
+	volatile u32 *csr = (volatile u32 *)CKSEG1ADDR(KN02_SLOT_BASE +
+						       KN02_CSR);
 	unsigned long flags;
 	int i;
 

trunk/arch/mips/dec/kn02xa-berr.c

@@ -20,6 +20,7 @@
 #include <linux/kernel.h>
 #include <linux/types.h>
 
+#include <asm/addrspace.h>
 #include <asm/system.h>
 #include <asm/traps.h>
 
@@ -29,8 +30,8 @@
 
 static inline void dec_kn02xa_be_ack(void)
 {
-	volatile u32 *mer = (void *)KN02XA_MER;
-	volatile u32 *mem_intr = (void *)KN02XA_MEM_INTR;
+	volatile u32 *mer = (void *)CKSEG1ADDR(KN02XA_MER);
+	volatile u32 *mem_intr = (void *)CKSEG1ADDR(KN02XA_MEM_INTR);
 
 	*mer = KN02CA_MER_INTR;		/* Clear errors; keep the ARC IRQ. */
 	*mem_intr = 0;			/* Any write clears the bus IRQ. */
@@ -40,8 +41,8 @@ static inline void dec_kn02xa_be_ack(void)
 static int dec_kn02xa_be_backend(struct pt_regs *regs, int is_fixup,
 				 int invoker)
 {
-	volatile u32 *kn02xa_mer = (void *)KN02XA_MER;
-	volatile u32 *kn02xa_ear = (void *)KN02XA_EAR;
+	volatile u32 *kn02xa_mer = (void *)CKSEG1ADDR(KN02XA_MER);
+	volatile u32 *kn02xa_ear = (void *)CKSEG1ADDR(KN02XA_EAR);
 
 	static const char excstr[] = "exception";
 	static const char intstr[] = "interrupt";
@@ -126,7 +127,7 @@ irqreturn_t dec_kn02xa_be_interrupt(int irq, void *dev_id,
 
 void __init dec_kn02xa_be_init(void)
 {
-	volatile u32 *mbcs = (void *)(KN4K_SLOT_BASE + KN4K_MB_CSR);
+	volatile u32 *mbcs = (void *)CKSEG1ADDR(KN4K_SLOT_BASE + KN4K_MB_CSR);
 
         /* For KN04 we need to make sure EE (?) is enabled in the MB.  */
         if (current_cpu_data.cputype == CPU_R4000SC)

trunk/arch/mips/dec/prom/identify.c

@@ -2,7 +2,7 @@
  * identify.c: machine identification code.
  *
  * Copyright (C) 1998 Harald Koerfgen and Paul M. Antoine
- * Copyright (C) 2002, 2003, 2004  Maciej W. Rozycki
+ * Copyright (C) 2002, 2003, 2004, 2005  Maciej W. Rozycki
  */
 #include <linux/init.h>
 #include <linux/kernel.h>
@@ -12,6 +12,7 @@
 #include <linux/types.h>
 
 #include <asm/bootinfo.h>
+
 #include <asm/dec/ioasic.h>
 #include <asm/dec/ioasic_addrs.h>
 #include <asm/dec/kn01.h>
@@ -21,6 +22,7 @@
 #include <asm/dec/kn03.h>
 #include <asm/dec/kn230.h>
 #include <asm/dec/prom.h>
+#include <asm/dec/system.h>
 
 #include "dectypes.h"
 
@@ -68,34 +70,44 @@ EXPORT_SYMBOL(dec_rtc_base);
 
 static inline void prom_init_kn01(void)
 {
-	dec_rtc_base = (void *)KN01_RTC_BASE;
+	dec_kn_slot_base = KN01_SLOT_BASE;
 	dec_kn_slot_size = KN01_SLOT_SIZE;
+
+	dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC);
 }
 
 static inline void prom_init_kn230(void)
 {
-	dec_rtc_base = (void *)KN01_RTC_BASE;
+	dec_kn_slot_base = KN01_SLOT_BASE;
 	dec_kn_slot_size = KN01_SLOT_SIZE;
+
+	dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN01_RTC);
 }
 
 static inline void prom_init_kn02(void)
 {
-	dec_rtc_base = (void *)KN02_RTC_BASE;
+	dec_kn_slot_base = KN02_SLOT_BASE;
 	dec_kn_slot_size = KN02_SLOT_SIZE;
+
+	dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC);
 }
 
 static inline void prom_init_kn02xa(void)
 {
-	ioasic_base = (void *)KN02XA_IOASIC_BASE;
-	dec_rtc_base = (void *)KN02XA_RTC_BASE;
+	dec_kn_slot_base = KN02XA_SLOT_BASE;
 	dec_kn_slot_size = IOASIC_SLOT_SIZE;
+
+	ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL);
+	dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY);
 }
 
 static inline void prom_init_kn03(void)
 {
-	ioasic_base = (void *)KN03_IOASIC_BASE;
-	dec_rtc_base = (void *)KN03_RTC_BASE;
+	dec_kn_slot_base = KN03_SLOT_BASE;
 	dec_kn_slot_size = IOASIC_SLOT_SIZE;
+
+	ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL);
+	dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY);
 }
 
 

trunk/arch/mips/dec/setup.c

@@ -39,6 +39,7 @@
 #include <asm/dec/kn02ca.h>
 #include <asm/dec/kn03.h>
 #include <asm/dec/kn230.h>
+#include <asm/dec/system.h>
 
 
 extern void dec_machine_restart(char *command);
@@ -48,10 +49,16 @@ extern irqreturn_t dec_intr_halt(int irq, void *dev_id, struct pt_regs *regs);
 
 extern asmlinkage void decstation_handle_int(void);
 
+unsigned long dec_kn_slot_base, dec_kn_slot_size;
+
+EXPORT_SYMBOL(dec_kn_slot_base);
+EXPORT_SYMBOL(dec_kn_slot_size);
+
 spinlock_t ioasic_ssr_lock;
 
 volatile u32 *ioasic_base;
-unsigned long dec_kn_slot_size;
+
+EXPORT_SYMBOL(ioasic_base);
 
 /*
  * IRQ routing and priority tables.  Priorites are set as follows:
@@ -78,6 +85,9 @@ unsigned long dec_kn_slot_size;
 int dec_interrupt[DEC_NR_INTS] = {
 	[0 ... DEC_NR_INTS - 1] = -1
 };
+
+EXPORT_SYMBOL(dec_interrupt);
+
 int_ptr cpu_mask_nr_tbl[DEC_MAX_CPU_INTS][2] = {
 	{ { .i = ~0 }, { .p = dec_intr_unimplemented } },
 };
@@ -755,7 +765,3 @@ void __init arch_init_irq(void)
 	if (dec_interrupt[DEC_IRQ_HALT] >= 0)
 		setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq);
 }
-
-EXPORT_SYMBOL(ioasic_base);
-EXPORT_SYMBOL(dec_kn_slot_size);
-EXPORT_SYMBOL(dec_interrupt);