Skip to content

Commit

Permalink
x86: mce: Lower maximum number of banks to architecture limit
Browse files Browse the repository at this point in the history
The Intel x86 architecture right now only supports 32 machine check
banks, more would bump into other MSRs.

So lower the max define to 32.

This only affects a few bitmaps, most data structures are dynamically
sized anyways.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
  • Loading branch information
Andi Kleen authored and H. Peter Anvin committed Jul 10, 2009
1 parent a2d32bc commit 3ccdccf
Showing 1 changed file with 4 additions and 3 deletions.
7 changes: 4 additions & 3 deletions arch/x86/include/asm/mce.h
Original file line number Diff line number Diff line change
Expand Up @@ -130,10 +130,11 @@ void mce_log(struct mce *m);
DECLARE_PER_CPU(struct sys_device, mce_dev);

/*
* To support more than 128 would need to escape the predefined
* Linux defined extended banks first.
* Maximum banks number.
* This is the limit of the current register layout on
* Intel CPUs.
*/
#define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
#define MAX_NR_BANKS 32

#ifdef CONFIG_X86_MCE_INTEL
extern int mce_cmci_disabled;
Expand Down

0 comments on commit 3ccdccf

Please sign in to comment.