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rt2800pci: add rt2800_bbp_[read,write]() wrappers
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Part of preparations for later code unification.

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Acked-by: Ivo van Doorn <IvDoorn@gmail.com>
Acked-by: Gertjan van Wingerde <gwingerde@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Bartlomiej Zolnierkiewicz authored and John W. Linville committed Nov 6, 2009
1 parent eff6ece commit 3e2c9df
Showing 1 changed file with 75 additions and 63 deletions.
138 changes: 75 additions & 63 deletions drivers/net/wireless/rt2x00/rt2800pci.c
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Original file line number Diff line number Diff line change
Expand Up @@ -135,6 +135,18 @@ static void rt2800pci_bbp_read(struct rt2x00_dev *rt2x00dev,
mutex_unlock(&rt2x00dev->csr_mutex);
}

static inline void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
const unsigned int word, const u8 value)
{
rt2800pci_bbp_write(rt2x00dev, word, value);
}

static inline void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word, u8 *value)
{
rt2800pci_bbp_read(rt2x00dev, word, value);
}

static void rt2800pci_rfcsr_write(struct rt2x00_dev *rt2x00dev,
const unsigned int word, const u8 value)
{
Expand Down Expand Up @@ -399,8 +411,8 @@ static const struct rt2x00debug rt2800pci_rt2x00debug = {
.word_count = EEPROM_SIZE / sizeof(u16),
},
.bbp = {
.read = rt2800pci_bbp_read,
.write = rt2800pci_bbp_write,
.read = rt2800_bbp_read,
.write = rt2800_bbp_write,
.word_base = BBP_BASE,
.word_size = sizeof(u8),
.word_count = BBP_SIZE / sizeof(u8),
Expand Down Expand Up @@ -766,8 +778,8 @@ static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
u8 r1;
u8 r3;

rt2800pci_bbp_read(rt2x00dev, 1, &r1);
rt2800pci_bbp_read(rt2x00dev, 3, &r3);
rt2800_bbp_read(rt2x00dev, 1, &r1);
rt2800_bbp_read(rt2x00dev, 3, &r3);

/*
* Configure the TX antenna.
Expand Down Expand Up @@ -800,8 +812,8 @@ static void rt2800pci_config_ant(struct rt2x00_dev *rt2x00dev,
break;
}

rt2800pci_bbp_write(rt2x00dev, 3, r3);
rt2800pci_bbp_write(rt2x00dev, 1, r1);
rt2800_bbp_write(rt2x00dev, 3, r3);
rt2800_bbp_write(rt2x00dev, 1, r1);
}

static void rt2800pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
Expand Down Expand Up @@ -944,26 +956,26 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,
/*
* Change BBP settings
*/
rt2800pci_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
rt2800pci_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
rt2800pci_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
rt2800pci_bbp_write(rt2x00dev, 86, 0);
rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
rt2800_bbp_write(rt2x00dev, 86, 0);

if (rf->channel <= 14) {
if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
rt2800pci_bbp_write(rt2x00dev, 82, 0x62);
rt2800pci_bbp_write(rt2x00dev, 75, 0x46);
rt2800_bbp_write(rt2x00dev, 82, 0x62);
rt2800_bbp_write(rt2x00dev, 75, 0x46);
} else {
rt2800pci_bbp_write(rt2x00dev, 82, 0x84);
rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
rt2800_bbp_write(rt2x00dev, 82, 0x84);
rt2800_bbp_write(rt2x00dev, 75, 0x50);
}
} else {
rt2800pci_bbp_write(rt2x00dev, 82, 0xf2);
rt2800_bbp_write(rt2x00dev, 82, 0xf2);

if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
rt2800pci_bbp_write(rt2x00dev, 75, 0x46);
rt2800_bbp_write(rt2x00dev, 75, 0x46);
else
rt2800pci_bbp_write(rt2x00dev, 75, 0x50);
rt2800_bbp_write(rt2x00dev, 75, 0x50);
}

rt2800_register_read(rt2x00dev, TX_BAND_CFG, &reg);
Expand Down Expand Up @@ -995,23 +1007,23 @@ static void rt2800pci_config_channel(struct rt2x00_dev *rt2x00dev,

rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);

rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
rt2800_bbp_read(rt2x00dev, 4, &bbp);
rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
rt2800pci_bbp_write(rt2x00dev, 4, bbp);
rt2800_bbp_write(rt2x00dev, 4, bbp);

rt2800pci_bbp_read(rt2x00dev, 3, &bbp);
rt2800_bbp_read(rt2x00dev, 3, &bbp);
rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
rt2800pci_bbp_write(rt2x00dev, 3, bbp);
rt2800_bbp_write(rt2x00dev, 3, bbp);

if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
if (conf_is_ht40(conf)) {
rt2800pci_bbp_write(rt2x00dev, 69, 0x1a);
rt2800pci_bbp_write(rt2x00dev, 70, 0x0a);
rt2800pci_bbp_write(rt2x00dev, 73, 0x16);
rt2800_bbp_write(rt2x00dev, 69, 0x1a);
rt2800_bbp_write(rt2x00dev, 70, 0x0a);
rt2800_bbp_write(rt2x00dev, 73, 0x16);
} else {
rt2800pci_bbp_write(rt2x00dev, 69, 0x16);
rt2800pci_bbp_write(rt2x00dev, 70, 0x08);
rt2800pci_bbp_write(rt2x00dev, 73, 0x11);
rt2800_bbp_write(rt2x00dev, 69, 0x16);
rt2800_bbp_write(rt2x00dev, 70, 0x08);
rt2800_bbp_write(rt2x00dev, 73, 0x11);
}
}

Expand All @@ -1025,9 +1037,9 @@ static void rt2800pci_config_txpower(struct rt2x00_dev *rt2x00dev,
u32 value = TXPOWER_G_TO_DEV(txpower);
u8 r1;

rt2800pci_bbp_read(rt2x00dev, 1, &r1);
rt2800_bbp_read(rt2x00dev, 1, &r1);
rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
rt2800pci_bbp_write(rt2x00dev, 1, r1);
rt2800_bbp_write(rt2x00dev, 1, r1);

rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
Expand Down Expand Up @@ -1176,7 +1188,7 @@ static inline void rt2800pci_set_vgc(struct rt2x00_dev *rt2x00dev,
struct link_qual *qual, u8 vgc_level)
{
if (qual->vgc_level != vgc_level) {
rt2800pci_bbp_write(rt2x00dev, 66, vgc_level);
rt2800_bbp_write(rt2x00dev, 66, vgc_level);
qual->vgc_level = vgc_level;
qual->vgc_level_reg = vgc_level;
}
Expand Down Expand Up @@ -1720,7 +1732,7 @@ static int rt2800pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
msleep(1);

for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
rt2800pci_bbp_read(rt2x00dev, 0, &value);
rt2800_bbp_read(rt2x00dev, 0, &value);
if ((value != 0xff) && (value != 0x00))
return 0;
udelay(REGISTER_BUSY_DELAY);
Expand All @@ -1741,33 +1753,33 @@ static int rt2800pci_init_bbp(struct rt2x00_dev *rt2x00dev)
rt2800pci_wait_bbp_ready(rt2x00dev)))
return -EACCES;

rt2800pci_bbp_write(rt2x00dev, 65, 0x2c);
rt2800pci_bbp_write(rt2x00dev, 66, 0x38);
rt2800pci_bbp_write(rt2x00dev, 69, 0x12);
rt2800pci_bbp_write(rt2x00dev, 70, 0x0a);
rt2800pci_bbp_write(rt2x00dev, 73, 0x10);
rt2800pci_bbp_write(rt2x00dev, 81, 0x37);
rt2800pci_bbp_write(rt2x00dev, 82, 0x62);
rt2800pci_bbp_write(rt2x00dev, 83, 0x6a);
rt2800pci_bbp_write(rt2x00dev, 84, 0x99);
rt2800pci_bbp_write(rt2x00dev, 86, 0x00);
rt2800pci_bbp_write(rt2x00dev, 91, 0x04);
rt2800pci_bbp_write(rt2x00dev, 92, 0x00);
rt2800pci_bbp_write(rt2x00dev, 103, 0x00);
rt2800pci_bbp_write(rt2x00dev, 105, 0x05);
rt2800_bbp_write(rt2x00dev, 65, 0x2c);
rt2800_bbp_write(rt2x00dev, 66, 0x38);
rt2800_bbp_write(rt2x00dev, 69, 0x12);
rt2800_bbp_write(rt2x00dev, 70, 0x0a);
rt2800_bbp_write(rt2x00dev, 73, 0x10);
rt2800_bbp_write(rt2x00dev, 81, 0x37);
rt2800_bbp_write(rt2x00dev, 82, 0x62);
rt2800_bbp_write(rt2x00dev, 83, 0x6a);
rt2800_bbp_write(rt2x00dev, 84, 0x99);
rt2800_bbp_write(rt2x00dev, 86, 0x00);
rt2800_bbp_write(rt2x00dev, 91, 0x04);
rt2800_bbp_write(rt2x00dev, 92, 0x00);
rt2800_bbp_write(rt2x00dev, 103, 0x00);
rt2800_bbp_write(rt2x00dev, 105, 0x05);

if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
rt2800pci_bbp_write(rt2x00dev, 69, 0x16);
rt2800pci_bbp_write(rt2x00dev, 73, 0x12);
rt2800_bbp_write(rt2x00dev, 69, 0x16);
rt2800_bbp_write(rt2x00dev, 73, 0x12);
}

if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION)
rt2800pci_bbp_write(rt2x00dev, 84, 0x19);
rt2800_bbp_write(rt2x00dev, 84, 0x19);

if (rt2x00_rt(&rt2x00dev->chip, RT3052)) {
rt2800pci_bbp_write(rt2x00dev, 31, 0x08);
rt2800pci_bbp_write(rt2x00dev, 78, 0x0e);
rt2800pci_bbp_write(rt2x00dev, 80, 0x08);
rt2800_bbp_write(rt2x00dev, 31, 0x08);
rt2800_bbp_write(rt2x00dev, 78, 0x0e);
rt2800_bbp_write(rt2x00dev, 80, 0x08);
}

for (i = 0; i < EEPROM_BBP_SIZE; i++) {
Expand All @@ -1776,7 +1788,7 @@ static int rt2800pci_init_bbp(struct rt2x00_dev *rt2x00dev)
if (eeprom != 0xffff && eeprom != 0x0000) {
reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
rt2800pci_bbp_write(rt2x00dev, reg_id, value);
rt2800_bbp_write(rt2x00dev, reg_id, value);
}
}

Expand All @@ -1795,9 +1807,9 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,

rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24);

rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
rt2800_bbp_read(rt2x00dev, 4, &bbp);
rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
rt2800pci_bbp_write(rt2x00dev, 4, bbp);
rt2800_bbp_write(rt2x00dev, 4, bbp);

rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
Expand All @@ -1806,27 +1818,27 @@ static u8 rt2800pci_init_rx_filter(struct rt2x00_dev *rt2x00dev,
/*
* Set power & frequency of passband test tone
*/
rt2800pci_bbp_write(rt2x00dev, 24, 0);
rt2800_bbp_write(rt2x00dev, 24, 0);

for (i = 0; i < 100; i++) {
rt2800pci_bbp_write(rt2x00dev, 25, 0x90);
rt2800_bbp_write(rt2x00dev, 25, 0x90);
msleep(1);

rt2800pci_bbp_read(rt2x00dev, 55, &passband);
rt2800_bbp_read(rt2x00dev, 55, &passband);
if (passband)
break;
}

/*
* Set power & frequency of stopband test tone
*/
rt2800pci_bbp_write(rt2x00dev, 24, 0x06);
rt2800_bbp_write(rt2x00dev, 24, 0x06);

for (i = 0; i < 100; i++) {
rt2800pci_bbp_write(rt2x00dev, 25, 0x90);
rt2800_bbp_write(rt2x00dev, 25, 0x90);
msleep(1);

rt2800pci_bbp_read(rt2x00dev, 55, &stopband);
rt2800_bbp_read(rt2x00dev, 55, &stopband);

if ((passband - stopband) <= filter_target) {
rfcsr24++;
Expand Down Expand Up @@ -1905,7 +1917,7 @@ static int rt2800pci_init_rfcsr(struct rt2x00_dev *rt2x00dev)
/*
* Set back to initial state
*/
rt2800pci_bbp_write(rt2x00dev, 24, 0);
rt2800_bbp_write(rt2x00dev, 24, 0);

rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr);
rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
Expand All @@ -1914,9 +1926,9 @@ static int rt2800pci_init_rfcsr(struct rt2x00_dev *rt2x00dev)
/*
* set BBP back to BW20
*/
rt2800pci_bbp_read(rt2x00dev, 4, &bbp);
rt2800_bbp_read(rt2x00dev, 4, &bbp);
rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
rt2800pci_bbp_write(rt2x00dev, 4, bbp);
rt2800_bbp_write(rt2x00dev, 4, bbp);

return 0;
}
Expand Down

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