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Syed Mohammed Khasim
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Tony Lindgren
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Sep 20, 2007
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refs/heads/master: f604931238dff7b44ef52ac2ad1f557e45b25b38 | ||
refs/heads/master: 72d0f1c3cdc7c456e1e357359ec6f566d0a5f264 |
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/* | ||
* linux/arch/arm/mach-omap2/board-2430sdp.c | ||
* | ||
* Copyright (C) 2006 Texas Instruments | ||
* | ||
* Modified from mach-omap2/board-generic.c | ||
* | ||
* Initial Code : Based on a patch from Komal Shah and Richard Woodruff | ||
* Updated the Code for 2430 SDP : Syed Mohammed Khasim | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/init.h> | ||
#include <linux/platform_device.h> | ||
#include <linux/mtd/mtd.h> | ||
#include <linux/mtd/partitions.h> | ||
#include <linux/delay.h> | ||
#include <linux/err.h> | ||
#include <linux/clk.h> | ||
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#include <asm/hardware.h> | ||
#include <asm/mach-types.h> | ||
#include <asm/mach/arch.h> | ||
#include <asm/mach/map.h> | ||
#include <asm/mach/flash.h> | ||
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#include <asm/arch/gpio.h> | ||
#include <asm/arch/mux.h> | ||
#include <asm/arch/board.h> | ||
#include <asm/arch/common.h> | ||
#include <asm/arch/gpmc.h> | ||
#include "prcm-regs.h" | ||
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#include <asm/io.h> | ||
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#define SDP2430_FLASH_CS 0 | ||
#define SDP2430_SMC91X_CS 5 | ||
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static struct mtd_partition sdp2430_partitions[] = { | ||
/* bootloader (U-Boot, etc) in first sector */ | ||
{ | ||
.name = "bootloader", | ||
.offset = 0, | ||
.size = SZ_256K, | ||
.mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
}, | ||
/* bootloader params in the next sector */ | ||
{ | ||
.name = "params", | ||
.offset = MTDPART_OFS_APPEND, | ||
.size = SZ_128K, | ||
.mask_flags = 0, | ||
}, | ||
/* kernel */ | ||
{ | ||
.name = "kernel", | ||
.offset = MTDPART_OFS_APPEND, | ||
.size = SZ_2M, | ||
.mask_flags = 0 | ||
}, | ||
/* file system */ | ||
{ | ||
.name = "filesystem", | ||
.offset = MTDPART_OFS_APPEND, | ||
.size = MTDPART_SIZ_FULL, | ||
.mask_flags = 0 | ||
} | ||
}; | ||
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static struct flash_platform_data sdp2430_flash_data = { | ||
.map_name = "cfi_probe", | ||
.width = 2, | ||
.parts = sdp2430_partitions, | ||
.nr_parts = ARRAY_SIZE(sdp2430_partitions), | ||
}; | ||
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static struct resource sdp2430_flash_resource = { | ||
.start = SDP2430_CS0_BASE, | ||
.end = SDP2430_CS0_BASE + SZ_64M - 1, | ||
.flags = IORESOURCE_MEM, | ||
}; | ||
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static struct platform_device sdp2430_flash_device = { | ||
.name = "omapflash", | ||
.id = 0, | ||
.dev = { | ||
.platform_data = &sdp2430_flash_data, | ||
}, | ||
.num_resources = 1, | ||
.resource = &sdp2430_flash_resource, | ||
}; | ||
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static struct resource sdp2430_smc91x_resources[] = { | ||
[0] = { | ||
.start = SDP2430_CS0_BASE, | ||
.end = SDP2430_CS0_BASE + SZ_64M - 1, | ||
.flags = IORESOURCE_MEM, | ||
}, | ||
[1] = { | ||
.start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | ||
.end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | ||
.flags = IORESOURCE_IRQ, | ||
}, | ||
}; | ||
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static struct platform_device sdp2430_smc91x_device = { | ||
.name = "smc91x", | ||
.id = -1, | ||
.num_resources = ARRAY_SIZE(sdp2430_smc91x_resources), | ||
.resource = sdp2430_smc91x_resources, | ||
}; | ||
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static struct platform_device *sdp2430_devices[] __initdata = { | ||
&sdp2430_smc91x_device, | ||
&sdp2430_flash_device, | ||
}; | ||
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static inline void __init sdp2430_init_smc91x(void) | ||
{ | ||
int eth_cs; | ||
unsigned long cs_mem_base; | ||
unsigned int rate; | ||
struct clk *l3ck; | ||
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eth_cs = SDP2430_SMC91X_CS; | ||
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l3ck = clk_get(NULL, "core_l3_ck"); | ||
if (IS_ERR(l3ck)) | ||
rate = 100000000; | ||
else | ||
rate = clk_get_rate(l3ck); | ||
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/* Make sure CS1 timings are correct, for 2430 always muxed */ | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG1, 0x00011200); | ||
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if (rate >= 160000000) { | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f01); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080803); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1c0b1c0a); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | ||
} else if (rate >= 130000000) { | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x041f1F1F); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000004C4); | ||
} else { /* rate = 100000000 */ | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG2, 0x001f1f00); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG3, 0x00080802); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG4, 0x1C091C09); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG5, 0x031A1F1F); | ||
gpmc_cs_write_reg(eth_cs, GPMC_CS_CONFIG6, 0x000003C2); | ||
} | ||
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if (gpmc_cs_request(eth_cs, SZ_16M, &cs_mem_base) < 0) { | ||
printk(KERN_ERR "Failed to request GPMC mem for smc91x\n"); | ||
return; | ||
} | ||
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sdp2430_smc91x_resources[0].start = cs_mem_base + 0x300; | ||
sdp2430_smc91x_resources[0].end = cs_mem_base + 0x30f; | ||
udelay(100); | ||
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if (omap_request_gpio(OMAP24XX_ETHR_GPIO_IRQ) < 0) { | ||
printk(KERN_ERR "Failed to request GPIO%d for smc91x IRQ\n", | ||
OMAP24XX_ETHR_GPIO_IRQ); | ||
gpmc_cs_free(eth_cs); | ||
return; | ||
} | ||
omap_set_gpio_direction(OMAP24XX_ETHR_GPIO_IRQ, 1); | ||
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} | ||
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static void __init omap_2430sdp_init_irq(void) | ||
{ | ||
omap2_init_common_hw(); | ||
omap_init_irq(); | ||
omap_gpio_init(); | ||
sdp2430_init_smc91x(); | ||
} | ||
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static struct omap_uart_config sdp2430_uart_config __initdata = { | ||
.enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)), | ||
}; | ||
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static struct omap_board_config_kernel sdp2430_config[] = { | ||
{OMAP_TAG_UART, &sdp2430_uart_config}, | ||
}; | ||
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static void __init omap_2430sdp_init(void) | ||
{ | ||
platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices)); | ||
omap_board_config = sdp2430_config; | ||
omap_board_config_size = ARRAY_SIZE(sdp2430_config); | ||
omap_serial_init(); | ||
} | ||
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static void __init omap_2430sdp_map_io(void) | ||
{ | ||
omap2_map_common_io(); | ||
} | ||
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MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | ||
/* Maintainer: Syed Khasim - Texas Instruments Inc */ | ||
.phys_io = 0x48000000, | ||
.io_pg_offst = ((0xd8000000) >> 18) & 0xfffc, | ||
.boot_params = 0x80000100, | ||
.map_io = omap_2430sdp_map_io, | ||
.init_irq = omap_2430sdp_init_irq, | ||
.init_machine = omap_2430sdp_init, | ||
.timer = &omap_timer, | ||
MACHINE_END |
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/* | ||
* linux/include/asm-arm/arch-omap/board-2430sdp.h | ||
* | ||
* Hardware definitions for TI OMAP2430 SDP board. | ||
* | ||
* Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify it | ||
* under the terms of the GNU General Public License as published by the | ||
* Free Software Foundation; either version 2 of the License, or (at your | ||
* option) any later version. | ||
* | ||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
* | ||
* You should have received a copy of the GNU General Public License along | ||
* with this program; if not, write to the Free Software Foundation, Inc., | ||
* 675 Mass Ave, Cambridge, MA 02139, USA. | ||
*/ | ||
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#ifndef __ASM_ARCH_OMAP_2430SDP_H | ||
#define __ASM_ARCH_OMAP_2430SDP_H | ||
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/* Placeholder for 2430SDP specific defines */ | ||
#define OMAP24XX_ETHR_START 0x08000300 | ||
#define OMAP24XX_ETHR_GPIO_IRQ 149 | ||
#define SDP2430_CS0_BASE 0x04000000 | ||
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#define TWL4030_IRQNUM INT_24XX_SYS_NIRQ | ||
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/* TWL4030 Primary Interrupt Handler (PIH) interrupts */ | ||
#define IH_TWL4030_BASE IH_BOARD_BASE | ||
#define IH_TWL4030_END (IH_TWL4030_BASE+8) | ||
#define NR_IRQS (IH_TWL4030_END) | ||
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#endif /* __ASM_ARCH_OMAP_2430SDP_H */ |
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