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yaml --- r: 296666 b: refs/heads/master c: e9dd7ed h: refs/heads/master v: v3
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Kuninori Morimoto
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Paul Mundt
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Mar 15, 2012
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refs/heads/master: 853a0231e057c04255a848f6998f84faaa635c58 | ||
refs/heads/master: e9dd7ed2a365b021cdbb35b5cad62f6ab6aeb5d2 |
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trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt
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trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
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trunk/Documentation/devicetree/bindings/dma/tegra20-apbdma.txt
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trunk/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt
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NVIDIA Tegra GPIO controller | ||
NVIDIA Tegra 2 GPIO controller | ||
|
||
Required properties: | ||
- compatible : "nvidia,tegra<chip>-gpio" | ||
- reg : Physical base address and length of the controller's registers. | ||
- interrupts : The interrupt outputs from the controller. For Tegra20, | ||
there should be 7 interrupts specified, and for Tegra30, there should | ||
be 8 interrupts specified. | ||
- compatible : "nvidia,tegra20-gpio" | ||
- #gpio-cells : Should be two. The first cell is the pin number and the | ||
second cell is used to specify optional parameters: | ||
- bit 0 specifies polarity (0 for normal, 1 for inverted) | ||
- gpio-controller : Marks the device node as a GPIO controller. | ||
- #interrupt-cells : Should be 2. | ||
The first cell is the GPIO number. | ||
The second cell is used to specify flags: | ||
bits[3:0] trigger type and level flags: | ||
1 = low-to-high edge triggered. | ||
2 = high-to-low edge triggered. | ||
4 = active high level-sensitive. | ||
8 = active low level-sensitive. | ||
Valid combinations are 1, 2, 3, 4, 8. | ||
- interrupt-controller : Marks the device node as an interrupt controller. | ||
|
||
Example: | ||
|
||
gpio: gpio@6000d000 { | ||
compatible = "nvidia,tegra20-gpio"; | ||
reg = < 0x6000d000 0x1000 >; | ||
interrupts = < 0 32 0x04 | ||
0 33 0x04 | ||
0 34 0x04 | ||
0 35 0x04 | ||
0 55 0x04 | ||
0 87 0x04 | ||
0 89 0x04 >; | ||
#gpio-cells = <2>; | ||
gpio-controller; | ||
#interrupt-cells = <2>; | ||
interrupt-controller; | ||
}; |
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