---

yaml --- r: 185538 b: refs/heads/master c: 10ae9bd h: refs/heads/master v: v3
git-mirror · Feb 22, 2010 · 3f4a4cf · 3f4a4cf
1 parent eb4dacb
commit 3f4a4cf
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Showing 3 changed files with 7 additions and 7 deletions.
diff --git a/[refs] b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4a7266123fce399f695b62b7f87b467b317f1487
+refs/heads/master: 10ae9bd25acf394c8fa2f9d795dfa9cec4d19ed6
diff --git a/trunk/drivers/gpu/drm/i915/i915_gem.c b/trunk/drivers/gpu/drm/i915/i915_gem.c
@@ -2544,6 +2544,12 @@ i915_gem_object_put_fence_reg(struct drm_gem_object *obj)
 	if (obj_priv->fence_reg == I915_FENCE_REG_NONE)
 		return 0;
 
+	/* If we've changed tiling, GTT-mappings of the object
+	 * need to re-fault to ensure that the correct fence register
+	 * setup is in place.
+	 */
+	i915_gem_release_mmap(obj);
+
 	/* On the i915, GPU access to tiled buffers is via a fence,
 	 * therefore we must wait for any outstanding access to complete
 	 * before clearing the fence.

diff --git a/trunk/drivers/gpu/drm/i915/i915_gem_tiling.c b/trunk/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -371,12 +371,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
 			goto err;
 		}
 
-		/* If we've changed tiling, GTT-mappings of the object
-		 * need to re-fault to ensure that the correct fence register
-		 * setup is in place.
-		 */
-		i915_gem_release_mmap(obj);
-
 		obj_priv->tiling_mode = args->tiling_mode;
 		obj_priv->stride = args->stride;
 	}