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[media] s5h1420: Unused variable clock_setting
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The switch/case was setting clock_setting that is not being used. Both switch/case and the variable definition were removed.

Currently clock is being calculated by the formula:
(state->fclk/1000000 - 8)

Tested by compilation only.

Signed-off-by: Peter Senna Tschudin <peter.senna@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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Peter Senna Tschudin authored and Mauro Carvalho Chehab committed Jun 21, 2012
1 parent 59f6a93 commit 3f7c0a6
Showing 1 changed file with 0 additions and 20 deletions.
20 changes: 0 additions & 20 deletions drivers/media/dvb/frontends/s5h1420.c
Original file line number Diff line number Diff line change
Expand Up @@ -634,7 +634,6 @@ static int s5h1420_set_frontend(struct dvb_frontend *fe)
struct s5h1420_state* state = fe->demodulator_priv;
int frequency_delta;
struct dvb_frontend_tune_settings fesettings;
uint8_t clock_setting;

dprintk("enter %s\n", __func__);

Expand Down Expand Up @@ -679,25 +678,6 @@ static int s5h1420_set_frontend(struct dvb_frontend *fe)
else
state->fclk = 44000000;

/* Clock */
switch (state->fclk) {
default:
case 88000000:
clock_setting = 80;
break;
case 86000000:
clock_setting = 78;
break;
case 80000000:
clock_setting = 72;
break;
case 59000000:
clock_setting = 51;
break;
case 44000000:
clock_setting = 36;
break;
}
dprintk("pll01: %d, ToneFreq: %d\n", state->fclk/1000000 - 8, (state->fclk + (TONE_FREQ * 32) - 1) / (TONE_FREQ * 32));
s5h1420_writereg(state, PLL01, state->fclk/1000000 - 8);
s5h1420_writereg(state, PLL02, 0x40);
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