---

yaml
---
r: 285507
b: refs/heads/master
c: 31b4f32
h: refs/heads/master
i:
  285505: 8605444
  285503: ac7b78c
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1ac6a854ad444680bffbacd9e340e40c75adc367
+refs/heads/master: 31b4f32c26d5a1999abb0e8ab308f80b4f4760c7

trunk/drivers/media/dvb/frontends/cx24123.c

@@ -601,8 +601,7 @@ static int cx24123_pll_calculate(struct dvb_frontend *fe,
  * Tuner cx24109 is written through a dedicated 3wire interface
  * on the demod chip.
  */
-static int cx24123_pll_writereg(struct dvb_frontend *fe,
-	struct dvb_frontend_parameters *p, u32 data)
+static int cx24123_pll_writereg(struct dvb_frontend *fe, u32 data)
 {
 	struct cx24123_state *state = fe->demodulator_priv;
 	unsigned long timeout;
@@ -673,12 +672,12 @@ static int cx24123_pll_tune(struct dvb_frontend *fe,
 	}
 
 	/* Write the new VCO/VGA */
-	cx24123_pll_writereg(fe, p, state->VCAarg);
-	cx24123_pll_writereg(fe, p, state->VGAarg);
+	cx24123_pll_writereg(fe, state->VCAarg);
+	cx24123_pll_writereg(fe, state->VGAarg);
 
 	/* Write the new bandselect and pll args */
-	cx24123_pll_writereg(fe, p, state->bandselectarg);
-	cx24123_pll_writereg(fe, p, state->pllarg);
+	cx24123_pll_writereg(fe, state->bandselectarg);
+	cx24123_pll_writereg(fe, state->pllarg);
 
 	/* set the FILTUNE voltage */
 	val = cx24123_readreg(state, 0x28) & ~0x3;