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yaml
---
r: 277437
b: refs/heads/master
c: 141168c
h: refs/heads/master
i:
  277435: 1f2aca2
v: v3
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Kevin Winchester authored and Ingo Molnar committed Dec 21, 2011
1 parent e9382df commit 425318f
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Showing 11 changed files with 8 additions and 37 deletions.
2 changes: 1 addition & 1 deletion [refs]
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
---
refs/heads/master: b49d7d877ff96428c8cd2076b33ba72bf85ceaba
refs/heads/master: 141168c36cdee3ff23d9c7700b0edc47cb65479f
2 changes: 0 additions & 2 deletions trunk/arch/x86/include/asm/processor.h
Original file line number Diff line number Diff line change
Expand Up @@ -99,7 +99,6 @@ struct cpuinfo_x86 {
u16 apicid;
u16 initial_apicid;
u16 x86_clflush_size;
#ifdef CONFIG_SMP
/* number of cores as seen by the OS: */
u16 booted_cores;
/* Physical processor id: */
Expand All @@ -110,7 +109,6 @@ struct cpuinfo_x86 {
u8 compute_unit_id;
/* Index into per_cpu list: */
u16 cpu_index;
#endif
u32 microcode;
} __attribute__((__aligned__(SMP_CACHE_BYTES)));

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8 changes: 2 additions & 6 deletions trunk/arch/x86/kernel/amd_nb.c
Original file line number Diff line number Diff line change
Expand Up @@ -123,16 +123,14 @@ int amd_get_subcaches(int cpu)
{
struct pci_dev *link = node_to_amd_nb(amd_get_nb_id(cpu))->link;
unsigned int mask;
int cuid = 0;
int cuid;

if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING))
return 0;

pci_read_config_dword(link, 0x1d4, &mask);

#ifdef CONFIG_SMP
cuid = cpu_data(cpu).compute_unit_id;
#endif
return (mask >> (4 * cuid)) & 0xf;
}

Expand All @@ -141,7 +139,7 @@ int amd_set_subcaches(int cpu, int mask)
static unsigned int reset, ban;
struct amd_northbridge *nb = node_to_amd_nb(amd_get_nb_id(cpu));
unsigned int reg;
int cuid = 0;
int cuid;

if (!amd_nb_has_feature(AMD_NB_L3_PARTITIONING) || mask > 0xf)
return -EINVAL;
Expand All @@ -159,9 +157,7 @@ int amd_set_subcaches(int cpu, int mask)
pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000);
}

#ifdef CONFIG_SMP
cuid = cpu_data(cpu).compute_unit_id;
#endif
mask <<= 4 * cuid;
mask |= (0xf ^ (1 << cuid)) << 26;

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2 changes: 0 additions & 2 deletions trunk/arch/x86/kernel/cpu/amd.c
Original file line number Diff line number Diff line change
Expand Up @@ -148,7 +148,6 @@ static void __cpuinit init_amd_k6(struct cpuinfo_x86 *c)

static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
/* calling is from identify_secondary_cpu() ? */
if (!c->cpu_index)
return;
Expand Down Expand Up @@ -192,7 +191,6 @@ static void __cpuinit amd_k7_smp_check(struct cpuinfo_x86 *c)

valid_k7:
;
#endif
}

static void __cpuinit init_amd_k7(struct cpuinfo_x86 *c)
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7 changes: 0 additions & 7 deletions trunk/arch/x86/kernel/cpu/common.c
Original file line number Diff line number Diff line change
Expand Up @@ -676,9 +676,7 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c)
if (this_cpu->c_early_init)
this_cpu->c_early_init(c);

#ifdef CONFIG_SMP
c->cpu_index = 0;
#endif
filter_cpuid_features(c, false);

setup_smep(c);
Expand Down Expand Up @@ -764,10 +762,7 @@ static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
c->apicid = c->initial_apicid;
# endif
#endif

#ifdef CONFIG_X86_HT
c->phys_proc_id = c->initial_apicid;
#endif
}

setup_smep(c);
Expand Down Expand Up @@ -1146,9 +1141,7 @@ static void dbg_restore_debug_regs(void)
*/
void __cpuinit x86_default_fixup_cpu_id(struct cpuinfo_x86 *c, int node)
{
#ifdef CONFIG_NUMA
pr_err("NUMA core number %d differs from configured core number %d\n", node, c->phys_proc_id);
#endif
}

/*
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2 changes: 0 additions & 2 deletions trunk/arch/x86/kernel/cpu/intel.c
Original file line number Diff line number Diff line change
Expand Up @@ -181,7 +181,6 @@ static void __cpuinit trap_init_f00f_bug(void)

static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
/* calling is from identify_secondary_cpu() ? */
if (!c->cpu_index)
return;
Expand All @@ -198,7 +197,6 @@ static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
"with B stepping processors.\n");
}
#endif
}

static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
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2 changes: 0 additions & 2 deletions trunk/arch/x86/kernel/cpu/mcheck/mce.c
Original file line number Diff line number Diff line change
Expand Up @@ -119,9 +119,7 @@ void mce_setup(struct mce *m)
m->time = get_seconds();
m->cpuvendor = boot_cpu_data.x86_vendor;
m->cpuid = cpuid_eax(1);
#ifdef CONFIG_SMP
m->socketid = cpu_data(m->extcpu).phys_proc_id;
#endif
m->apicid = cpu_data(m->extcpu).initial_apicid;
rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap);
}
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7 changes: 1 addition & 6 deletions trunk/arch/x86/kernel/cpu/mcheck/mce_amd.c
Original file line number Diff line number Diff line change
Expand Up @@ -64,11 +64,9 @@ struct threshold_bank {
};
static DEFINE_PER_CPU(struct threshold_bank * [NR_BANKS], threshold_banks);

#ifdef CONFIG_SMP
static unsigned char shared_bank[NR_BANKS] = {
0, 0, 0, 0, 1
};
#endif

static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */

Expand Down Expand Up @@ -202,10 +200,9 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)

if (!block)
per_cpu(bank_map, cpu) |= (1 << bank);
#ifdef CONFIG_SMP
if (shared_bank[bank] && c->cpu_core_id)
break;
#endif

offset = setup_APIC_mce(offset,
(high & MASK_LVTOFF_HI) >> 20);

Expand Down Expand Up @@ -531,7 +528,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)

sprintf(name, "threshold_bank%i", bank);

#ifdef CONFIG_SMP
if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
i = cpumask_first(cpu_llc_shared_mask(cpu));

Expand All @@ -558,7 +554,6 @@ static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)

goto out;
}
#endif

b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
if (!b) {
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4 changes: 1 addition & 3 deletions trunk/arch/x86/kernel/cpu/proc.c
Original file line number Diff line number Diff line change
Expand Up @@ -64,12 +64,10 @@ static void show_cpuinfo_misc(struct seq_file *m, struct cpuinfo_x86 *c)
static int show_cpuinfo(struct seq_file *m, void *v)
{
struct cpuinfo_x86 *c = v;
unsigned int cpu = 0;
unsigned int cpu;
int i;

#ifdef CONFIG_SMP
cpu = c->cpu_index;
#endif
seq_printf(m, "processor\t: %u\n"
"vendor_id\t: %s\n"
"cpu family\t: %d\n"
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2 changes: 0 additions & 2 deletions trunk/drivers/edac/sb_edac.c
Original file line number Diff line number Diff line change
Expand Up @@ -1609,11 +1609,9 @@ static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val,
mce->cpuvendor, mce->cpuid, mce->time,
mce->socketid, mce->apicid);

#ifdef CONFIG_SMP
/* Only handle if it is the right mc controller */
if (cpu_data(mce->cpu).phys_proc_id != pvt->sbridge_dev->mc)
return NOTIFY_DONE;
#endif

smp_rmb();
if ((pvt->mce_out + 1) % MCE_LOG_LEN == pvt->mce_in) {
Expand Down
7 changes: 3 additions & 4 deletions trunk/drivers/hwmon/coretemp.c
Original file line number Diff line number Diff line change
Expand Up @@ -57,16 +57,15 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius");
#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1)
#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)

#ifdef CONFIG_SMP
#define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
#define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)

#ifdef CONFIG_SMP
#define for_each_sibling(i, cpu) for_each_cpu(i, cpu_sibling_mask(cpu))
#else
#define TO_PHYS_ID(cpu) (cpu)
#define TO_CORE_ID(cpu) (cpu)
#define for_each_sibling(i, cpu) for (i = 0; false; )
#endif
#define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)

/*
* Per-Core Temperature Data
Expand Down

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