Skip to content

Commit

Permalink
ARM: OMAP4: hwmod data: add some interconnect-related IP blocks
Browse files Browse the repository at this point in the history
Add the SL2 interface IP block and interconnect data.  The SL2 is related
to the IVA-HD subsystem.

Add IP block and interconnect data for the C2C ("Chip-to-chip")
interconnect.  This can provide a direct system interconnect link to
other devices stacked on the OMAP package.

Add the ELM IP block and interconnect data.  The ELM can be used
to locate errors in NAND flash connected to the GPMC.


Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Benoît Cousson <b-cousson@ti.com>
  • Loading branch information
Paul Walmsley committed Apr 19, 2012
1 parent 896d4e9 commit 42b9e38
Show file tree
Hide file tree
Showing 2 changed files with 221 additions and 4 deletions.
224 changes: 220 additions & 4 deletions arch/arm/mach-omap2/omap_hwmod_44xx_data.c
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,27 @@
* IP blocks
*/

/*
* 'c2c_target_fw' class
* instance(s): c2c_target_fw
*/
static struct omap_hwmod_class omap44xx_c2c_target_fw_hwmod_class = {
.name = "c2c_target_fw",
};

/* c2c_target_fw */
static struct omap_hwmod omap44xx_c2c_target_fw_hwmod = {
.name = "c2c_target_fw",
.class = &omap44xx_c2c_target_fw_hwmod_class,
.clkdm_name = "d2d_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET,
.context_offs = OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET,
},
},
};

/*
* 'dmm' class
* instance(s): dmm
Expand Down Expand Up @@ -249,8 +270,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* - They still need to be validated with the driver
* properly adapted to omap_hwmod / omap_device
*
* c2c
* c2c_target_fw
* cm_core
* cm_core_aon
* ctrl_module_core
Expand All @@ -260,7 +279,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* debugss
* efuse_ctrl_cust
* efuse_ctrl_std
* elm
* mpu_c0
* mpu_c1
* ocmc_ram
Expand All @@ -269,7 +287,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
* prcm_mpu
* prm
* scrm
* sl2if
* usb_host_fs
* usb_host_hs
* usb_phy_cm
Expand Down Expand Up @@ -331,6 +348,41 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
},
};

/*
* 'c2c' class
* chip 2 chip interface used to plug the ape soc (omap) with an external modem
* soc
*/

static struct omap_hwmod_class omap44xx_c2c_hwmod_class = {
.name = "c2c",
};

/* c2c */
static struct omap_hwmod_irq_info omap44xx_c2c_irqs[] = {
{ .irq = 88 + OMAP44XX_IRQ_GIC_START },
{ .irq = -1 }
};

static struct omap_hwmod_dma_info omap44xx_c2c_sdma_reqs[] = {
{ .dma_req = 68 + OMAP44XX_DMA_REQ_START },
{ .dma_req = -1 }
};

static struct omap_hwmod omap44xx_c2c_hwmod = {
.name = "c2c",
.class = &omap44xx_c2c_hwmod_class,
.clkdm_name = "d2d_clkdm",
.mpu_irqs = omap44xx_c2c_irqs,
.sdma_reqs = omap44xx_c2c_sdma_reqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET,
.context_offs = OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET,
},
},
};

/*
* 'counter' class
* 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
Expand Down Expand Up @@ -806,6 +858,46 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
},
};

/*
* 'elm' class
* bch error location module
*/

static struct omap_hwmod_class_sysconfig omap44xx_elm_sysc = {
.rev_offs = 0x0000,
.sysc_offs = 0x0010,
.syss_offs = 0x0014,
.sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
SYSS_HAS_RESET_STATUS),
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
.sysc_fields = &omap_hwmod_sysc_type1,
};

static struct omap_hwmod_class omap44xx_elm_hwmod_class = {
.name = "elm",
.sysc = &omap44xx_elm_sysc,
};

/* elm */
static struct omap_hwmod_irq_info omap44xx_elm_irqs[] = {
{ .irq = 4 + OMAP44XX_IRQ_GIC_START },
{ .irq = -1 }
};

static struct omap_hwmod omap44xx_elm_hwmod = {
.name = "elm",
.class = &omap44xx_elm_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.mpu_irqs = omap44xx_elm_irqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L4PER_ELM_CLKCTRL_OFFSET,
.context_offs = OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET,
},
},
};

/*
* 'emif' class
* external memory interface no1
Expand Down Expand Up @@ -2296,6 +2388,29 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
},
};

/*
* 'sl2if' class
* shared level 2 memory interface
*/

static struct omap_hwmod_class omap44xx_sl2if_hwmod_class = {
.name = "sl2if",
};

/* sl2if */
static struct omap_hwmod omap44xx_sl2if_hwmod = {
.name = "sl2if",
.class = &omap44xx_sl2if_hwmod_class,
.clkdm_name = "ivahd_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_IVAHD_SL2_CLKCTRL_OFFSET,
.context_offs = OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET,
.modulemode = MODULEMODE_HWCTRL,
},
},
};

/*
* 'slimbus' class
* bidirectional, multi-drop, multi-channel two-line serial interface between
Expand Down Expand Up @@ -3222,6 +3337,32 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
* interfaces
*/

static struct omap_hwmod_addr_space omap44xx_c2c_target_fw_addrs[] = {
{
.pa_start = 0x4a204000,
.pa_end = 0x4a2040ff,
.flags = ADDR_TYPE_RT
},
{ }
};

/* c2c -> c2c_target_fw */
static struct omap_hwmod_ocp_if omap44xx_c2c__c2c_target_fw = {
.master = &omap44xx_c2c_hwmod,
.slave = &omap44xx_c2c_target_fw_hwmod,
.clk = "div_core_ck",
.addr = omap44xx_c2c_target_fw_addrs,
.user = OCP_USER_MPU,
};

/* l4_cfg -> c2c_target_fw */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__c2c_target_fw = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_c2c_target_fw_hwmod,
.clk = "l4_div_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

/* l3_main_1 -> dmm */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
.master = &omap44xx_l3_main_1_hwmod,
Expand All @@ -3248,6 +3389,14 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
.user = OCP_USER_MPU,
};

/* c2c -> emif_fw */
static struct omap_hwmod_ocp_if omap44xx_c2c__emif_fw = {
.master = &omap44xx_c2c_hwmod,
.slave = &omap44xx_emif_fw_hwmod,
.clk = "div_core_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

/* dmm -> emif_fw */
static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
.master = &omap44xx_dmm_hwmod,
Expand Down Expand Up @@ -3356,6 +3505,14 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
.user = OCP_USER_MPU,
};

/* c2c_target_fw -> l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_c2c_target_fw__l3_main_2 = {
.master = &omap44xx_c2c_target_fw_hwmod,
.slave = &omap44xx_l3_main_2_hwmod,
.clk = "l3_div_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

/* dma_system -> l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = {
.master = &omap44xx_dma_system_hwmod,
Expand Down Expand Up @@ -3588,6 +3745,14 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = {
.user = OCP_USER_SDMA,
};

/* l3_main_2 -> c2c */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__c2c = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_c2c_hwmod,
.clk = "l3_div_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {
{
.pa_start = 0x4a304000,
Expand Down Expand Up @@ -3670,6 +3835,14 @@ static struct omap_hwmod_ocp_if omap44xx_dsp__iva = {
.user = OCP_USER_DSP,
};

/* dsp -> sl2if */
static struct omap_hwmod_ocp_if omap44xx_dsp__sl2if = {
.master = &omap44xx_dsp_hwmod,
.slave = &omap44xx_sl2if_hwmod,
.clk = "dpll_iva_m5x2_ck",
.user = OCP_USER_DSP,
};

/* l4_cfg -> dsp */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dsp = {
.master = &omap44xx_l4_cfg_hwmod,
Expand Down Expand Up @@ -3930,6 +4103,24 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
.user = OCP_USER_MPU,
};

static struct omap_hwmod_addr_space omap44xx_elm_addrs[] = {
{
.pa_start = 0x48078000,
.pa_end = 0x48078fff,
.flags = ADDR_TYPE_RT
},
{ }
};

/* l4_per -> elm */
static struct omap_hwmod_ocp_if omap44xx_l4_per__elm = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_elm_hwmod,
.clk = "l4_div_ck",
.addr = omap44xx_elm_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

static struct omap_hwmod_addr_space omap44xx_emif1_addrs[] = {
{
.pa_start = 0x4c000000,
Expand Down Expand Up @@ -4262,6 +4453,14 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

/* iva -> sl2if */
static struct omap_hwmod_ocp_if omap44xx_iva__sl2if = {
.master = &omap44xx_iva_hwmod,
.slave = &omap44xx_sl2if_hwmod,
.clk = "dpll_iva_m5x2_ck",
.user = OCP_USER_IVA,
};

static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = {
{
.pa_start = 0x5a000000,
Expand Down Expand Up @@ -4682,6 +4881,14 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

/* l3_main_2 -> sl2if */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__sl2if = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_sl2if_hwmod,
.clk = "l3_div_ck",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};

static struct omap_hwmod_addr_space omap44xx_slimbus1_addrs[] = {
{
.pa_start = 0x4012c000,
Expand Down Expand Up @@ -5271,8 +5478,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
};

static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_c2c__c2c_target_fw,
&omap44xx_l4_cfg__c2c_target_fw,
&omap44xx_l3_main_1__dmm,
&omap44xx_mpu__dmm,
&omap44xx_c2c__emif_fw,
&omap44xx_dmm__emif_fw,
&omap44xx_l4_cfg__emif_fw,
&omap44xx_iva__l3_instr,
Expand All @@ -5284,6 +5494,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_mmc1__l3_main_1,
&omap44xx_mmc2__l3_main_1,
&omap44xx_mpu__l3_main_1,
&omap44xx_c2c_target_fw__l3_main_2,
&omap44xx_dma_system__l3_main_2,
&omap44xx_fdif__l3_main_2,
&omap44xx_gpu__l3_main_2,
Expand All @@ -5308,11 +5519,13 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_mpu__mpu_private,
&omap44xx_l4_abe__aess,
&omap44xx_l4_abe__aess_dma,
&omap44xx_l3_main_2__c2c,
&omap44xx_l4_wkup__counter_32k,
&omap44xx_l4_cfg__dma_system,
&omap44xx_l4_abe__dmic,
&omap44xx_l4_abe__dmic_dma,
&omap44xx_dsp__iva,
&omap44xx_dsp__sl2if,
&omap44xx_l4_cfg__dsp,
&omap44xx_l3_main_2__dss,
&omap44xx_l4_per__dss,
Expand All @@ -5328,6 +5541,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l4_per__dss_rfbi,
&omap44xx_l3_main_2__dss_venc,
&omap44xx_l4_per__dss_venc,
&omap44xx_l4_per__elm,
&omap44xx_emif_fw__emif1,
&omap44xx_emif_fw__emif2,
&omap44xx_l4_cfg__fdif,
Expand All @@ -5347,6 +5561,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l4_per__i2c4,
&omap44xx_l3_main_2__ipu,
&omap44xx_l3_main_2__iss,
&omap44xx_iva__sl2if,
&omap44xx_l3_main_2__iva,
&omap44xx_l4_wkup__kbd,
&omap44xx_l4_cfg__mailbox,
Expand All @@ -5370,6 +5585,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l4_per__mmc3,
&omap44xx_l4_per__mmc4,
&omap44xx_l4_per__mmc5,
&omap44xx_l3_main_2__sl2if,
&omap44xx_l4_abe__slimbus1,
&omap44xx_l4_abe__slimbus1_dma,
&omap44xx_l4_per__slimbus2,
Expand Down
1 change: 1 addition & 0 deletions arch/arm/plat-omap/include/plat/omap_hwmod.h
Original file line number Diff line number Diff line change
Expand Up @@ -214,6 +214,7 @@ struct omap_hwmod_addr_space {
#define OCP_USER_MPU (1 << 0)
#define OCP_USER_SDMA (1 << 1)
#define OCP_USER_DSP (1 << 2)
#define OCP_USER_IVA (1 << 3)

/* omap_hwmod_ocp_if.flags bits */
#define OCPIF_SWSUP_IDLE (1 << 0)
Expand Down

0 comments on commit 42b9e38

Please sign in to comment.