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Merge branch 'for-2635-4/spi-devs' into for-2635-4/partial2 Conflicts: arch/arm/mach-s5pc100/include/mach/map.h arch/arm/mach-s5pv210/Makefile
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/* linux/arch/arm/mach-s5p6440/dev-spi.c | ||
* | ||
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
* Jaswinder Singh <jassi.brar@samsung.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
|
||
#include <linux/platform_device.h> | ||
#include <linux/dma-mapping.h> | ||
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||
#include <mach/dma.h> | ||
#include <mach/map.h> | ||
#include <mach/irqs.h> | ||
#include <mach/gpio.h> | ||
#include <mach/spi-clocks.h> | ||
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#include <plat/s3c64xx-spi.h> | ||
#include <plat/gpio-cfg.h> | ||
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static char *spi_src_clks[] = { | ||
[S5P6440_SPI_SRCCLK_PCLK] = "pclk", | ||
[S5P6440_SPI_SRCCLK_SCLK] = "spi_epll", | ||
}; | ||
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/* SPI Controller platform_devices */ | ||
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/* Since we emulate multi-cs capability, we do not touch the CS. | ||
* The emulated CS is toggled by board specific mechanism, as it can | ||
* be either some immediate GPIO or some signal out of some other | ||
* chip in between ... or some yet another way. | ||
* We simply do not assume anything about CS. | ||
*/ | ||
static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) | ||
{ | ||
switch (pdev->id) { | ||
case 0: | ||
s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2)); | ||
s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2)); | ||
s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2)); | ||
s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP); | ||
s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP); | ||
s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP); | ||
break; | ||
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||
case 1: | ||
s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2)); | ||
s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2)); | ||
s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2)); | ||
s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP); | ||
s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP); | ||
s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP); | ||
break; | ||
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default: | ||
dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
return -EINVAL; | ||
} | ||
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return 0; | ||
} | ||
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static struct resource s5p6440_spi0_resource[] = { | ||
[0] = { | ||
.start = S5P6440_PA_SPI0, | ||
.end = S5P6440_PA_SPI0 + 0x100 - 1, | ||
.flags = IORESOURCE_MEM, | ||
}, | ||
[1] = { | ||
.start = DMACH_SPI0_TX, | ||
.end = DMACH_SPI0_TX, | ||
.flags = IORESOURCE_DMA, | ||
}, | ||
[2] = { | ||
.start = DMACH_SPI0_RX, | ||
.end = DMACH_SPI0_RX, | ||
.flags = IORESOURCE_DMA, | ||
}, | ||
[3] = { | ||
.start = IRQ_SPI0, | ||
.end = IRQ_SPI0, | ||
.flags = IORESOURCE_IRQ, | ||
}, | ||
}; | ||
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static struct s3c64xx_spi_info s5p6440_spi0_pdata = { | ||
.cfg_gpio = s5p6440_spi_cfg_gpio, | ||
.fifo_lvl_mask = 0x1ff, | ||
.rx_lvl_offset = 15, | ||
}; | ||
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static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
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struct platform_device s5p6440_device_spi0 = { | ||
.name = "s3c64xx-spi", | ||
.id = 0, | ||
.num_resources = ARRAY_SIZE(s5p6440_spi0_resource), | ||
.resource = s5p6440_spi0_resource, | ||
.dev = { | ||
.dma_mask = &spi_dmamask, | ||
.coherent_dma_mask = DMA_BIT_MASK(32), | ||
.platform_data = &s5p6440_spi0_pdata, | ||
}, | ||
}; | ||
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static struct resource s5p6440_spi1_resource[] = { | ||
[0] = { | ||
.start = S5P6440_PA_SPI1, | ||
.end = S5P6440_PA_SPI1 + 0x100 - 1, | ||
.flags = IORESOURCE_MEM, | ||
}, | ||
[1] = { | ||
.start = DMACH_SPI1_TX, | ||
.end = DMACH_SPI1_TX, | ||
.flags = IORESOURCE_DMA, | ||
}, | ||
[2] = { | ||
.start = DMACH_SPI1_RX, | ||
.end = DMACH_SPI1_RX, | ||
.flags = IORESOURCE_DMA, | ||
}, | ||
[3] = { | ||
.start = IRQ_SPI1, | ||
.end = IRQ_SPI1, | ||
.flags = IORESOURCE_IRQ, | ||
}, | ||
}; | ||
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static struct s3c64xx_spi_info s5p6440_spi1_pdata = { | ||
.cfg_gpio = s5p6440_spi_cfg_gpio, | ||
.fifo_lvl_mask = 0x7f, | ||
.rx_lvl_offset = 15, | ||
}; | ||
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struct platform_device s5p6440_device_spi1 = { | ||
.name = "s3c64xx-spi", | ||
.id = 1, | ||
.num_resources = ARRAY_SIZE(s5p6440_spi1_resource), | ||
.resource = s5p6440_spi1_resource, | ||
.dev = { | ||
.dma_mask = &spi_dmamask, | ||
.coherent_dma_mask = DMA_BIT_MASK(32), | ||
.platform_data = &s5p6440_spi1_pdata, | ||
}, | ||
}; | ||
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void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
{ | ||
struct s3c64xx_spi_info *pd; | ||
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/* Reject invalid configuration */ | ||
if (!num_cs || src_clk_nr < 0 | ||
|| src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) { | ||
printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
return; | ||
} | ||
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switch (cntrlr) { | ||
case 0: | ||
pd = &s5p6440_spi0_pdata; | ||
break; | ||
case 1: | ||
pd = &s5p6440_spi1_pdata; | ||
break; | ||
default: | ||
printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
__func__, cntrlr); | ||
return; | ||
} | ||
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pd->num_cs = num_cs; | ||
pd->src_clk_nr = src_clk_nr; | ||
pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
} |
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/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h | ||
* | ||
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
* Jaswinder Singh <jassi.brar@samsung.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#ifndef __S5P6440_PLAT_SPI_CLKS_H | ||
#define __S5P6440_PLAT_SPI_CLKS_H __FILE__ | ||
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#define S5P6440_SPI_SRCCLK_PCLK 0 | ||
#define S5P6440_SPI_SRCCLK_SCLK 1 | ||
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#endif /* __S5P6440_PLAT_SPI_CLKS_H */ |
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/* linux/arch/arm/mach-s5p6442/dev-spi.c | ||
* | ||
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
* Jaswinder Singh <jassi.brar@samsung.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#include <linux/platform_device.h> | ||
#include <linux/dma-mapping.h> | ||
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#include <mach/dma.h> | ||
#include <mach/map.h> | ||
#include <mach/irqs.h> | ||
#include <mach/gpio.h> | ||
#include <mach/spi-clocks.h> | ||
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#include <plat/s3c64xx-spi.h> | ||
#include <plat/gpio-cfg.h> | ||
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static char *spi_src_clks[] = { | ||
[S5P6442_SPI_SRCCLK_PCLK] = "pclk", | ||
[S5P6442_SPI_SRCCLK_SCLK] = "spi_epll", | ||
}; | ||
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/* SPI Controller platform_devices */ | ||
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/* Since we emulate multi-cs capability, we do not touch the CS. | ||
* The emulated CS is toggled by board specific mechanism, as it can | ||
* be either some immediate GPIO or some signal out of some other | ||
* chip in between ... or some yet another way. | ||
* We simply do not assume anything about CS. | ||
*/ | ||
static int s5p6442_spi_cfg_gpio(struct platform_device *pdev) | ||
{ | ||
switch (pdev->id) { | ||
case 0: | ||
s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2)); | ||
s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2)); | ||
s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2)); | ||
s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP); | ||
s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP); | ||
s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP); | ||
break; | ||
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default: | ||
dev_err(&pdev->dev, "Invalid SPI Controller number!"); | ||
return -EINVAL; | ||
} | ||
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return 0; | ||
} | ||
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static struct resource s5p6442_spi0_resource[] = { | ||
[0] = { | ||
.start = S5P6442_PA_SPI, | ||
.end = S5P6442_PA_SPI + 0x100 - 1, | ||
.flags = IORESOURCE_MEM, | ||
}, | ||
[1] = { | ||
.start = DMACH_SPI0_TX, | ||
.end = DMACH_SPI0_TX, | ||
.flags = IORESOURCE_DMA, | ||
}, | ||
[2] = { | ||
.start = DMACH_SPI0_RX, | ||
.end = DMACH_SPI0_RX, | ||
.flags = IORESOURCE_DMA, | ||
}, | ||
[3] = { | ||
.start = IRQ_SPI0, | ||
.end = IRQ_SPI0, | ||
.flags = IORESOURCE_IRQ, | ||
}, | ||
}; | ||
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static struct s3c64xx_spi_info s5p6442_spi0_pdata = { | ||
.cfg_gpio = s5p6442_spi_cfg_gpio, | ||
.fifo_lvl_mask = 0x1ff, | ||
.rx_lvl_offset = 15, | ||
}; | ||
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static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
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struct platform_device s5p6442_device_spi = { | ||
.name = "s3c64xx-spi", | ||
.id = 0, | ||
.num_resources = ARRAY_SIZE(s5p6442_spi0_resource), | ||
.resource = s5p6442_spi0_resource, | ||
.dev = { | ||
.dma_mask = &spi_dmamask, | ||
.coherent_dma_mask = DMA_BIT_MASK(32), | ||
.platform_data = &s5p6442_spi0_pdata, | ||
}, | ||
}; | ||
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void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) | ||
{ | ||
struct s3c64xx_spi_info *pd; | ||
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/* Reject invalid configuration */ | ||
if (!num_cs || src_clk_nr < 0 | ||
|| src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) { | ||
printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); | ||
return; | ||
} | ||
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switch (cntrlr) { | ||
case 0: | ||
pd = &s5p6442_spi0_pdata; | ||
break; | ||
default: | ||
printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", | ||
__func__, cntrlr); | ||
return; | ||
} | ||
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pd->num_cs = num_cs; | ||
pd->src_clk_nr = src_clk_nr; | ||
pd->src_clk_name = spi_src_clks[src_clk_nr]; | ||
} |
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,17 @@ | ||
/* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h | ||
* | ||
* Copyright (C) 2010 Samsung Electronics Co. Ltd. | ||
* Jaswinder Singh <jassi.brar@samsung.com> | ||
* | ||
* This program is free software; you can redistribute it and/or modify | ||
* it under the terms of the GNU General Public License version 2 as | ||
* published by the Free Software Foundation. | ||
*/ | ||
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#ifndef __S5P6442_PLAT_SPI_CLKS_H | ||
#define __S5P6442_PLAT_SPI_CLKS_H __FILE__ | ||
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#define S5P6442_SPI_SRCCLK_PCLK 0 | ||
#define S5P6442_SPI_SRCCLK_SCLK 1 | ||
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#endif /* __S5P6442_PLAT_SPI_CLKS_H */ |
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