[SPARC64]: Fix incorrect TSB lock bit handling.

The TSB_LOCK_BIT define is actually a special
value shifted down by 32-bits for the assembler
code macros.

In C code, this isn't what we want.

Signed-off-by: David S. Miller <davem@davemloft.net>

arch/sparc64/mm/tsb.c

@@ -184,7 +184,7 @@ static void copy_tsb(struct tsb *old_tsb, unsigned long old_size,
 			: "=r" (tag), "=r" (pte)
 			: "r" (&old_tsb[i]), "i" (ASI_NUCLEUS_QUAD_LDD));
 
-		if (!tag || (tag & TSB_TAG_LOCK))
+		if (!tag || (tag & (1UL << TSB_TAG_LOCK_BIT)))
 			continue;
 
 		/* We only put base page size PTEs into the TSB,

include/asm-sparc64/tsb.h

@@ -47,13 +47,14 @@
  * possible solution is to use RCU for the freeing of the TSB.
  */
 
-#define TSB_TAG_LOCK	(1 << (47 - 32))
+#define TSB_TAG_LOCK_BIT	47
+#define TSB_TAG_LOCK_HIGH	(1 << (TSB_TAG_LOCK_BIT - 32))
 
 #define TSB_MEMBAR	membar	#StoreStore
 
 #define TSB_LOCK_TAG(TSB, REG1, REG2)	\
 99:	lduwa	[TSB] ASI_N, REG1;	\
-	sethi	%hi(TSB_TAG_LOCK), REG2;\
+	sethi	%hi(TSB_TAG_LOCK_HIGH), REG2;\
 	andcc	REG1, REG2, %g0;	\
 	bne,pn	%icc, 99b;		\
 	 nop;				\