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ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
this patch adds tick timer, smp entries and generic DT machine for SiRFmarco dual-core SMP chips. with the added marco, we change the defconfig, using the same defconfig, we get a zImage which can work on both prima2 and marco. Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Mark Rutland <mark.rutland@arm.com>
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/* | ||
* Entry of the second core for CSR Marco dual-core SMP SoCs | ||
* | ||
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company. | ||
* | ||
* Licensed under GPLv2 or later. | ||
*/ | ||
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#include <linux/linkage.h> | ||
#include <linux/init.h> | ||
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__INIT | ||
/* | ||
* Cold boot and hardware reset show different behaviour, | ||
* system will be always panic if we warm-reset the board | ||
* Here we invalidate L1 of CPU1 to make sure there isn't | ||
* uninitialized data written into memory later | ||
*/ | ||
ENTRY(v7_invalidate_l1) | ||
mov r0, #0 | ||
mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache | ||
mcr p15, 2, r0, c0, c0, 0 | ||
mrc p15, 1, r0, c0, c0, 0 | ||
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ldr r1, =0x7fff | ||
and r2, r1, r0, lsr #13 | ||
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ldr r1, =0x3ff | ||
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and r3, r1, r0, lsr #3 @ NumWays - 1 | ||
add r2, r2, #1 @ NumSets | ||
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and r0, r0, #0x7 | ||
add r0, r0, #4 @ SetShift | ||
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clz r1, r3 @ WayShift | ||
add r4, r3, #1 @ NumWays | ||
1: sub r2, r2, #1 @ NumSets-- | ||
mov r3, r4 @ Temp = NumWays | ||
2: subs r3, r3, #1 @ Temp-- | ||
mov r5, r3, lsl r1 | ||
mov r6, r2, lsl r0 | ||
orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift) | ||
mcr p15, 0, r5, c7, c6, 2 | ||
bgt 2b | ||
cmp r2, #0 | ||
bgt 1b | ||
dsb | ||
isb | ||
mov pc, lr | ||
ENDPROC(v7_invalidate_l1) | ||
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/* | ||
* SIRFSOC specific entry point for secondary CPUs. This provides | ||
* a "holding pen" into which all secondary cores are held until we're | ||
* ready for them to initialise. | ||
*/ | ||
ENTRY(sirfsoc_secondary_startup) | ||
bl v7_invalidate_l1 | ||
mrc p15, 0, r0, c0, c0, 5 | ||
and r0, r0, #15 | ||
adr r4, 1f | ||
ldmia r4, {r5, r6} | ||
sub r4, r4, r5 | ||
add r6, r6, r4 | ||
pen: ldr r7, [r6] | ||
cmp r7, r0 | ||
bne pen | ||
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/* | ||
* we've been released from the holding pen: secondary_stack | ||
* should now contain the SVC stack for this core | ||
*/ | ||
b secondary_startup | ||
ENDPROC(sirfsoc_secondary_startup) | ||
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.align | ||
1: .long . | ||
.long pen_release |
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Original file line number | Diff line number | Diff line change |
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/* | ||
* CPU hotplug support for CSR Marco dual-core SMP SoCs | ||
* | ||
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company. | ||
* | ||
* Licensed under GPLv2 or later. | ||
*/ | ||
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#include <linux/kernel.h> | ||
#include <linux/errno.h> | ||
#include <linux/smp.h> | ||
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#include <asm/cacheflush.h> | ||
#include <asm/smp_plat.h> | ||
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static inline void platform_do_lowpower(unsigned int cpu) | ||
{ | ||
flush_cache_all(); | ||
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/* we put the platform to just WFI */ | ||
for (;;) { | ||
__asm__ __volatile__("dsb\n\t" "wfi\n\t" | ||
: : : "memory"); | ||
if (pen_release == cpu_logical_map(cpu)) { | ||
/* | ||
* OK, proper wakeup, we're done | ||
*/ | ||
break; | ||
} | ||
} | ||
} | ||
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/* | ||
* platform-specific code to shutdown a CPU | ||
* | ||
* Called with IRQs disabled | ||
*/ | ||
void sirfsoc_cpu_die(unsigned int cpu) | ||
{ | ||
platform_do_lowpower(cpu); | ||
} |
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