---

yaml
---
r: 331434
b: refs/heads/master
c: f2f41c6
h: refs/heads/master
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 6d8a1393ec700d8621858dd0f3bee2b7e821e9fc
+refs/heads/master: f2f41c68eabfb32574f9088135480618206dd432

trunk/arch/m68k/include/asm/m54xxsim.h

@@ -46,6 +46,12 @@
 #define MCF_IRQ_UART2		(MCFINT_VECBASE + 33)
 #define MCF_IRQ_UART3		(MCFINT_VECBASE + 32)
 
+/*
+ *	Slice Timer support.
+ */
+#define MCFSLT_TIMER0		(MCF_MBAR + 0x900)	/* Base addr TIMER0 */
+#define MCFSLT_TIMER1		(MCF_MBAR + 0x910)	/* Base addr TIMER1 */
+
 /*
  *	Generic GPIO support
  */

trunk/arch/m68k/include/asm/mcfslt.h

@@ -12,13 +12,6 @@
 #define mcfslt_h
 /****************************************************************************/
 
-/*
- *	Get address specific defines for the 547x.
- */
-#define MCFSLT_TIMER0		0x900	/* Base address of TIMER0 */
-#define MCFSLT_TIMER1		0x910	/* Base address of TIMER1 */
-
-
 /*
  *	Define the SLT timer register set addresses.
  */

trunk/arch/m68k/platform/coldfire/sltimers.c

@@ -32,7 +32,7 @@
 /*
  *	By default use Slice Timer 1 as the profiler clock timer.
  */
-#define	PA(a)	(MCF_MBAR + MCFSLT_TIMER1 + (a))
+#define	PA(a)	(MCFSLT_TIMER1 + (a))
 
 /*
  *	Choose a reasonably fast profile timer. Make it an odd value to
@@ -76,7 +76,7 @@ void mcfslt_profile_init(void)
 /*
  *	By default use Slice Timer 0 as the system clock timer.
  */
-#define	TA(a)	(MCF_MBAR + MCFSLT_TIMER0 + (a))
+#define	TA(a)	(MCFSLT_TIMER0 + (a))
 
 static u32 mcfslt_cycles_per_jiffy;
 static u32 mcfslt_cnt;