---

yaml
---
r: 338459
b: refs/heads/master
c: 81db077
h: refs/heads/master
i:
  338457: b243f5c
  338455: 3eb4a05
v: v3

[refs]

@@ -1,2 +1,2 @@
 ---
-refs/heads/master: f965b9c46bf832daff8e31796486e7e424bd72c5
+refs/heads/master: 81db0772dc16b31185418f51ce6a1c0098a84367

trunk/drivers/tty/serial/8250/8250.c

@@ -280,7 +280,8 @@ static const struct serial8250_config uart_config[] = {
 		.fifo_size	= 64,
 		.tx_loadsz	= 64,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
-		.flags		= UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR,
+		.flags		= UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
+				  UART_CAP_SLEEP,
 	},
 	[PORT_XR17V35X] = {
 		.name		= "XR17V35X",
@@ -591,7 +592,8 @@ static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
 	 * offset but the UART channel may only write to the corresponding
 	 * bit.
 	 */
-	if (p->port.type == PORT_XR17V35X) {
+	if ((p->port.type == PORT_XR17V35X) ||
+	   (p->port.type == PORT_XR17D15X)) {
 		serial_out(p, UART_EXAR_SLEEP, 0xff);
 		return;
 	}
@@ -1056,8 +1058,12 @@ static void autoconfig_16550a(struct uart_8250_port *up)
 	 * Exar uarts have EFR in a weird location
 	 */
 	if (up->port.flags & UPF_EXAR_EFR) {
+		DEBUG_AUTOCONF("Exar XR17D15x ");
 		up->port.type = PORT_XR17D15X;
-		up->capabilities |= UART_CAP_AFE | UART_CAP_EFR;
+		up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
+				    UART_CAP_SLEEP;
+
+		return;
 	}
 
 	/*