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ARM: mx3: Fix a race condition in mxcmmc
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From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001
From: Volker Ernst <volker.ernst@txtr.com>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC
controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12
in the INT-handler anymore. INT-handler might be called during
an ongoing PIO-data-transfer (with some other INT-flag set) and
PIO-transfer depends on these bits being set to detect the end
of the data-transfer. This also means that at the end of PIO-
transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared
in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by: Volker Ernst <volker.ernst@txtr.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Cc: Andy Green <andy@warmcat.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Daniel Mack authored and Sascha Hauer committed May 17, 2010
1 parent a2ef456 commit 4a31f2e
Showing 1 changed file with 12 additions and 1 deletion.
13 changes: 12 additions & 1 deletion drivers/mmc/host/mxcmmc.c
Original file line number Diff line number Diff line change
Expand Up @@ -489,6 +489,9 @@ static void mxcmci_datawork(struct work_struct *work)
struct mxcmci_host *host = container_of(work, struct mxcmci_host,
datawork);
int datastat = mxcmci_transfer_data(host);

writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
host->base + MMC_REG_STATUS);
mxcmci_finish_data(host, datastat);

if (host->req->stop) {
Expand Down Expand Up @@ -553,14 +556,22 @@ static irqreturn_t mxcmci_irq(int irq, void *devid)
u32 stat;

stat = readl(host->base + MMC_REG_STATUS);
writel(stat & ~STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS);

dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);

spin_lock_irqsave(&host->lock, flags);
sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
spin_unlock_irqrestore(&host->lock, flags);

#ifdef HAS_DMA
if (mxcmci_use_dma(host) &&
(stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
host->base + MMC_REG_STATUS);
#endif

if (sdio_irq) {
writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
mmc_signal_sdio_irq(host->mmc);
Expand Down

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